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Capacitor structures

a capacitor and structure technology, applied in capacitors, solid-state devices, transistors, etc., can solve the problems of high leakage current density of thin layers of silicon dioxide, poor interface characteristics of materials with silicon, and high density of interface states

Inactive Publication Date: 2005-08-04
ROUND ROCK RES LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, thin layers of silicon dioxide can have high leakage current density due to direct band-to-band tunneling current or Fowler-Nordheim tunneling current.
A difficulty with the utilization of high dielectric constant insulating materials is that the materials can have poor interface characteristics with silicon, and a high density of interface states.
Such interface states can cause poor reliability of a capacitor structure, in that they can charge with time under use conditions.
The resulting electric fields can cause breakdown of the thin dielectric insulators.

Method used

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Embodiment Construction

[0030] This disclosure of the invention is submitted in furtherance of the constitutional purposes of the U.S. Patent Laws “to promote the progress of science and useful arts” (Article 1, Section 8).

[0031] The invention encompasses new processes for forming capacitor structures wherein low-temperature processing is utilized to form one or more of aluminum nitride, aluminum oxynitride, or aluminum oxide within a dielectric material between two capacitor plates. The low temperature processing comprises forming a metallic layer of aluminum, and subsequently converting the metallic layer to one or more of aluminum nitride, aluminum oxynitride, or aluminum oxide. For purposes of interpreting this disclosure and the claims that follow, “low temperature” processing is to be understood as processing occurring at less than or equal to 200° C.

[0032] Low temperature processing can provide numerous advantages for formation of semiconductor device structures. For instance, studies indicate tha...

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Abstract

The invention includes a method of forming a capacitor structure. A first electrical node is formed, and a layer of metallic aluminum is formed over the first electrical node. Subsequently, an entirety of the metallic aluminum within the layer is transformed into one or more of AlN, AlON, and AlO, with the transformed layer being a dielectric material over the first electrical node. A second electrical node is then formed over the dielectric material. The first electrical node, second electrical node and dielectric material together define at least a portion of the capacitor structure. The invention also pertains to a capacitor structure which includes a first electrical node, a second electrical node, and a dielectric material between the first and second electrical nodes. The dielectric material consists essentially of aluminum, oxygen and nitrogen.

Description

[0001] This patent resulted from a divisional of U.S. patent application Ser. No. 10 / 931,570, entitled “Capacitor Structures” which was filed on Aug. 31, 2004 which is a divisional of U.S. patent application Ser. No. 10 / 171,131, entitled “Capacitor Structures” which was filed on Jun. 11, 2002 which is a divisional of U.S. patent application Ser. No. 09 / 755,673 entitled “Methods of Forming Capacitor Structures” which was filed on Jan. 5, 2001; and which are hereby incorporated by reference. TECHNICAL FIELD [0002] The invention pertains to methods of forming capacitor structures, and also pertains to capacitor structures. BACKGROUND OF THE INVENTION [0003] As silicon device sizes becoming increasingly smaller, and as a minimum feature size of CMOS devices approaches and goes below the 0.1 micrometer regime, very thin gate insulators can be required to keep the capacitance of a dynamic random access (DRAM) capacitor cell in a 30 femptofarad (fF) range. For instance, if insulators are f...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L21/02H01L21/314H01L21/316H01L21/318
CPCH01L21/3144H01L28/40H01L21/318H01L21/31683H01L21/02244H01L21/02247H01L21/02252
Inventor FORBES, LEONARDAHN, KIE Y.ELDRIDGE, JEROME MICHAEL
Owner ROUND ROCK RES LLC