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Polishing pads and planarizing machines for mechanical or chemical-mechanical planarization of microelectronic-device substrate assemblies, and methods for making and using such pads and machines

a technology of microelectronic devices and planarizing machines, which is applied in the direction of grinding machines, flexible wheel wheels, manufacturing tools, etc., can solve the problems of components below the desired endpoint being damaged or completely destroyed, slurry may not uniformly contact, and it is difficult to accurately focus the photo-pattern to within the tolerance approaching 0.1 m, etc., to achieve precise size and shape

Inactive Publication Date: 2005-09-01
AGARWAL VISHNU K +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention is about improving polishing pads used in the manufacturing of microelectronic devices. The invention involves adding pattern elements to the polishing pad, which define a base section and a plurality of contour surfaces. These pattern elements are made of colloidal silica particles and are deposited onto the backing member of the pad. A hard cover layer is then deposited over the pattern elements to form hard nodules that define the abrasive elements of the pad. The pattern elements are preferably colloidal silica particles that can be manufactured in precise sizes and shapes. The cover layer can be composed of an abrasive layer of material deposited over the pattern elements. The polishing pad can be used to planarize microelectronic-device substrate assemblies by depositing a planarizing solution onto the pad and pressing the substrate assembly against the hard nodules. The hard nodules abrade material from the face of the substrate assembly in a similar way to fixed-abrasive pads. The technical effects of this invention include improved polishing efficiency, reduced substrate damage, and improved planarization quality.

Problems solved by technology

For example, it is difficult to accurately focus photo-patterns to within tolerances approaching 0.1 μm on nonplanar substrate surfaces because submicron photolithographic equipment generally has a very limited depth of field.
Additionally, when a substrate assembly 12 is over planarized, components below the desired endpoint may be damaged or completely destroyed.
One problem with abrasive slurries is that the slurry may not uniformly contact the face of a substrate assembly 12 because the leading edge of the substrate assembly 12 wipes the slurry off of the pad 40.
Using FAPs, however, presents some drawbacks in CMP processing.
One drawback of existing FAPs is that the abrasive particles in the FAPs may not adequately planarize substrate assemblies with very small components (e.g., components with a dimension of 0.25 μM or less).
The particle size distribution in FAPs, however, may not be small enough to planarize very small components because individual abrasive particles may agglomerate into larger abrasive elements that have a plurality of individual particles.
Additionally, large abrasive elements may scratch the substrate assembly and produce defects, or they may damage very small components of the integrated circuitry on a substrate assembly.
Thus, the agglomeration of abrasive particles into larger abrasive elements is a serious problem for fabricating very small electronic components with FAPs.
Another drawback of FAPs is that it is difficult to obtain the desired distribution of abrasive particles in the resin even when the individual abrasive particles do not form a significant number of larger abrasive elements.
For example, it is generally difficult to control the distribution of the abrasive particles in the resin because the resin typically has a relatively high viscosity that inhibits uniform mixing of the abrasive particles.
One particularly difficult application is producing FAPs with ceria abrasive particles because it is difficult to manufacture small ceria particles and it is difficult to uniformly mix ceria particles in a liquid.
Thus, even if the abrasive particles do not agglomerate extensively, it is still difficult to obtain a desired distribution of abrasive particles at the planarizing surface of an FAP.
Still another concern of using FAPs is that these pads are relatively expensive and may wear out rather quickly.
FAPs are relatively expensive because of the difficulties in obtaining sufficiently small particle sizes and a desired distribution of the abrasive particles, as explained above.
Moreover, FAPs are subject to wear because the substrate assembly rubs against the resin at the planarizing surface causing the resin to wear down.
As a result, some of the abrasive particles may detach from the resin and cause defects, or the abrasiveness of the pad may be sufficiently altered to produce inconsistent planarizing results.
Therefore, using FAPs may increase the costs of planarizing microelectronic-device substrate assemblies.

Method used

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  • Polishing pads and planarizing machines for mechanical or chemical-mechanical planarization of microelectronic-device substrate assemblies, and methods for making and using such pads and machines
  • Polishing pads and planarizing machines for mechanical or chemical-mechanical planarization of microelectronic-device substrate assemblies, and methods for making and using such pads and machines
  • Polishing pads and planarizing machines for mechanical or chemical-mechanical planarization of microelectronic-device substrate assemblies, and methods for making and using such pads and machines

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Embodiment Construction

[0027] The present disclosure describes polishing pads for planarizing microelectronic-device substrate assemblies, methods for making such polishing pads, and machines and methods for using such polishing pads. Many specific details of certain embodiments of the invention are set forth in the following description and in FIGS. 2-8 to provide a thorough understanding of such embodiments. One skilled in the art, however, will understand that the present invention may have additional embodiments, or that the invention may be practiced without several of the details described in the following description.

[0028]FIG. 2 is a partial schematic isometric view of a polishing pad 140 in accordance with one embodiment of the invention for planarizing microelectronic-device substrate assemblies. The polishing pad 140 includes a backing member 150 having a first surface 152 and a second surface 154, a plurality of pattern elements 160 distributed over the first surface 152 of the backing member...

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Abstract

Polishing pads used in the manufacturing of microelectronic devices, and apparatuses and methods for making and using such polishing pads. In one aspect of the invention, a polishing pad for planarizing microelectronic-device substrate assemblies has a backing member including a first surface and a second surface, a plurality of pattern elements distributed over the first surface of the backing member, and a hard cover layer over the pattern elements. The pattern elements define a plurality of contour surfaces projecting away from the first surface of the backing member. The cover layer at least substantially conforms to the contour surfaces of the pattern elements to form a plurality of hard nodules projecting away from the first surface of the backing member. The hard nodules define abrasive elements to contact and abrade material from a microelectronic-device substrate assembly. As such, the cover layer defines at least a portion of a planarizing surface of the polishing pad.

Description

TECHNICAL FIELD [0001] The present invention relates to polishing pads for planarizing microelectronic-device substrate assemblies, and to methods for making and using such polishing pads in mechanical and / or chemical-mechanical planarization processes. BACKGROUND OF THE INVENTION [0002] Mechanical and chemical-mechanical planarizing processes (collectively “CMP”) are used in the manufacturing of electronic devices for forming a flat surface on semiconductor wafers, field emission displays and many other microelectronic-device substrate assemblies. CMP processes generally remove material from a substrate assembly to create a highly planar surface at a precise elevation in the layers of material on the substrate assembly. [0003]FIG. 1 schematically illustrates an existing web-format planarizing machine 10 for planarizing a substrate assembly 12. The planarizing machine 10 has a support table 14 with a top panel 16 at a workstation where an operative portion (A) of a polishing pad 40 ...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): B24B37/22B24B37/26B24D3/22B24D13/14
CPCB24B37/22B24B37/26Y10S977/883Y10S977/888Y10S977/776B24D3/22
Inventor AGARWAL, VISHNU K.MEIKLE, SCOTT G.
Owner AGARWAL VISHNU K