Flash memory devices and methods for fabricating flash memory devices

Abstract

A flash memory device includes a cell string having a plurality of cell transistors connected in series, and a string selection transistor and a ground selection transistor connected to both ends of the cell string, respectively, wherein the cell transistor has a channel impurity concentration higher than a channel impurity concentration of at least one of the string selection transistor and the ground selection transistor.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention relates to semiconductor devices and methods for fabricating semiconductor devices. More particularly, the invention relates to flash memory devices and methods for fabricating the same.[0003]2. Description of the Related Art[0004]A cell array of a memory device may include a plurality of cell transistors. In flash memory devices, a channel impurity concentration of the cell transistors constituting a cell array is, in general, closely related to a threshold voltage, a leakage current and / or a boosting efficiency. Accordingly, it is desired to provide cell transistors, which are employable by memory devices, and which have reduced current leakage characteristics, reduced dispersion of channel impurity concentration and an appropriate impurity concentration at each region.[0005]In some cases, to compensate for lower impurity concentrations at a surface of an active region as a result of, e.g., high ...

AI Technical Summary

Benefits of technology

[0007]It is therefore a feature of an embodiment of the present invention to provide a method for compensating for a concentration drop resulting from impurity diffusion while reducing and / or preventing an increase in an overall concentration of a channel impurity layer.

[0009]It is therefore a separate feature of an embodiment of the present invention to provide a flash memory device including a cell transistor having improved data maintaining characteristics.

[0010]It is therefore a separate feature of an embodiment of the present invention to provide a flash memory device including a cell transistor having a lower amount of GIDL around a selection transistor and having a high boosting efficiency.

[0011]It is therefore a separate feature of an embodiment of the present invention to provide a flash memory device including a cell transistor having improved data maintaining characteristics, having a lower amount of GIDL around a selection transistor and having a high boosting efficiency.

Problems solved by technology

However, when a channel impurity layer is formed by increasing a dose of impurity, gate induced drain leakage (GIDL) may occur around, e.g., a selection transistor of a NAND-type flash memory device, and may thereby deteriorate boosting efficiency.

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