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Nonvolatile memory device and method of manufacturing the same

a non-volatile memory and memory device technology, applied in the direction of semiconductor devices, electrical devices, transistors, etc., can solve the problem of reducing the operating speed of the semiconductor device, and achieve the effect of increasing the cell curren

Inactive Publication Date: 2009-05-14
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The patent text describes a nonvolatile memory device and a method of manufacturing it that can increase the cell current. The device includes a semiconductor substrate with an active region and a device isolation layer. A sense line and a word line cross the active region and the device isolation layer. The word line includes a gate insulation layer and a gate electrode. The method of manufacturing includes forming the device isolation layer with a trench and recessing a portion of the device isolation layer to expose the side-upper surface of the active region. The technical effect is to increase the cell current of the nonvolatile memory device.

Problems solved by technology

Additionally, a low power voltage caused by the decreased cell current may reduce an operating speed of the semiconductor device.

Method used

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  • Nonvolatile memory device and method of manufacturing the same
  • Nonvolatile memory device and method of manufacturing the same
  • Nonvolatile memory device and method of manufacturing the same

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Embodiment Construction

[0042]Detailed example embodiments are disclosed herein. However, specific structural and functional details disclosed herein are merely representative for purposes of describing example embodiments. Example embodiments may, however, be embodied in many alternate forms and should not be construed as limited to only the embodiments set forth herein.

[0043]Accordingly, while example embodiments are capable of various modifications and alternative forms, embodiments thereof are shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that there is no intent to limit example embodiments to the particular forms disclosed, but to the contrary, example embodiments are to cover all modifications, equivalents, and alternatives falling within the scope of example embodiments. Like numbers refer to like elements throughout the description of the figures.

[0044]It will be understood that, although the terms first, second, etc. may be used h...

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Abstract

The nonvolatile memory device includes a semiconductor substrate, and a device isolation layer defining an active region in the semiconductor substrate. The device isolation layer includes a top surface lower than a top surface of the semiconductor substrate, such that a side-upper surface of the active region is exposed. A sense line crosses both the active region and the device isolation layer, and a word line, spaced apart from the sense line, crosses both the active region and the device isolation layer.

Description

FOREIGN PRIORITY STATEMENT[0001]This application claims priority under 35 U.S.C. §119 to Korean Patent Application No. 10-2007-0113790, filed on Nov. 8, 2007, the entire contents of which are incorporated herein by reference.BACKGROUND[0002]1. Field[0003]An example embodiments provides a semiconductor memory device and a method of manufacturing the same, and more particularly, to a nonvolatile memory device and a method of manufacturing the same.[0004]2. Description of the Related Art[0005]Nonvolatile memory devices can maintain stored data while external power is turned off. Such nonvolatile memory devices include a mask read only memory (mask ROM) device, an erasable programmable read-only memory (EPROM) device, an electrically erasable programmable read-only memory (EEPROM) device, and a flash memory device. The flash memory device is classified into a NOR-type flash memory device and a NAND-type flash memory device.[0006]FIG. 1 is a plan view of a conventional EEPROM device. FIG...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L27/115H10B69/00
CPCH01L27/11519H01L27/11524H01L27/11521H10B41/10H10B41/35H10B41/30H01L21/823493
Inventor YU, TEA-KWANGHAN, JEONG-UKKIM, YONG-TAE
Owner SAMSUNG ELECTRONICS CO LTD