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Multi Instance Unified Shader Engine Filtering System With Level One and Level Two Cache

a shader engine and cache technology, applied in image memory management, processor architecture/configuration, instruments, etc., can solve the problems of static or intermittent errors in shader pipe arrays, and achieve the effect of faster fetch times and greater data throughpu

Inactive Publication Date: 2009-12-17
ADVANCED MICRO DEVICES INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0014]Simplifications or omissions may be made to avoid obscuring the purpose of the section. Such simplifications or omissions are not intended to limit the scope of the present invention. Consistent with the principles of the present invention as embodied and broadly described herein, the present invention includes method and apparatus for a multiple instance shader engine filtering system wherein where each shader engine comprises multiple rows of shader engine filters combined with level one and level two cache systems. Each unified shader engine filter row comprises a shader pipe array, a texture filter, with access to a level one cache system and a level two cache. The shader pipe array accepts instructions from an executing shader program, including input, output, ALU, and texture or general memory load / store requests with addresses data from register files in the shader pipes and program constants to generate the return texel or memory data based on state data controlling the pipelined address and filtering operations for a specific pixel, vertex, primitive, surface or general compute thread. The texture mapping unit retrieves texel data stored in a level one cache system, with the ability to read and write to and from a level two cache system, and through formatting and bilinear filtering interpolations generates a formatted bilinear result based on the specific pixel's neighboring texels. Utilizing multiple rows of shader engine filters within a shader engine allows for the parallel processing of multiple simultaneous resource requests. Utilizing multiple shader engines allows for greater processing through the use of multiple simultaneous processing.
[0019]In another embodiment the communication between a level one cache system and a level two cache systems utilizes more than one memory channel thereby resulting in a greater data throughput.
[0020]In another embodiment one or more level one cache systems can allocate defined areas of memory to be shared amongst other resources, including other level one cache systems. In certain instances this approach will allow for quicker fetch times of texel data where the required data has already been moved from a level two cache system to a level one cache system.

Problems solved by technology

An error within the shader pipe array can be static or intermittent, and could be caused, for example, because of a manufacturing or post-manufacturing defect, component degradation, external interference, and / or inadvertent static discharge, or other electrical or environmental condition or occurrence.

Method used

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  • Multi Instance Unified Shader Engine Filtering System With Level One and Level Two Cache
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  • Multi Instance Unified Shader Engine Filtering System With Level One and Level Two Cache

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Embodiment Construction

[0029]The invention will be better understood from the following descriptions of various “embodiments” of the invention. Thus, specific “embodiments” are views of the invention, but each is not the whole invention. The present invention relates to a multiple instance shader engine filtering system wherein where each shader engine comprises multiple rows of shader engine filters combined with level one and level two cache systems. Each unified shader engine filter row accepts texture requests for a specified pixel from a resource and performs rendering and texture calculations, outputting texel data. In embodiments of this invention, bilinear texture filtering, trilinear texture filtering, and anisotropic texture mapping are applied to texel data stored in a multi level cache system. In another embodiment, a redundant shader system can be added and configured to each unified shader engine filter row to effectively repair defective shader pipes within the shader pipe array of the same...

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Abstract

Apparatus and systems utilizing multiple shader engines where each shader engine comprises multiple rows of shader engine filters combined with level one and level two cache systems. Each unified shader engine filter comprises a shader pipe array, and a texture mapping unit with access to a level one cache system and a level two cache. The shader pipe array accepts texture requests for a specified pixel from a resource and performs associated rendering calculations, outputting texel data. The texture mapping unit retrieves texel data stored in a level one cache system, with the ability to read and write to and from a level two cache system, and through formatting and bilinear filtering interpolations generates a formatted bilinear result based on the specific pixel's neighboring texels. Utilizing multiple rows of shader engine filters within a shader engine allows for the parallel processing of multiple simultaneous resource requests. Utilizing multiple shader engines allows for greater processing through the use of multiple simultaneous processing. A method utilizing multiple shader engines to perform texture mapping is also presented.

Description

CROSS REFERENCE TO RELATED APPLICATIONS[0001]This application claims the benefit under 35 U.S.C. §119(e) to U.S. Provisional Patent Application No. 61 / 057,499 filed May 30, 2008; U.S. Provisional Patent Application No. 61 / 057,483 filed May 30, 2008; U.S. Provisional Patent Application No. 61 / 057,492 filed May 30, 2008; U.S. Provisional Patent Application No. 61 / 057,504 filed May 30, 2008; and U.S. Provisional Patent Application No. 61 / 057,513 filed May 30, 2008, which are incorporated by reference herein in their entireties.BACKGROUND[0002]1. Field of the Invention[0003]The present invention is generally directed to computing operations performed in computing systems, and more particularly directed to graphics processing tasks performed in computing systems.[0004]2. Related Art[0005]A graphics processing unit (GPU) is a complex integrated circuit that is specially designed to perform graphics processing tasks. A GPU can, for example, execute graphics processing tasks required by an ...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G09G5/02G06T1/20
CPCG09G2360/06G09G5/363G06T1/20G06T1/60
Inventor DELAURIER, ANTHONY P.LEATHER, MARKHARTOG, ROBERT S.MANTOR, MICHAEL J.FOWLER, MARK C.BRADY, JEFFREY T.ZINI, MARCOS P.
Owner ADVANCED MICRO DEVICES INC
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