Systems and methods for storing, retrieving, and adjusting read thresholds in flash memory storage system
Patent Information
- Authority / Receiving Office
- US · United States
- Current Assignee / Owner
- AVAGO TECH WIRELESS IP SINGAPORE PTE
- Publication Date
- 2012-01-12
- Estimated Expiration
- Not applicable · inactive patent
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Abstract
Description
REFERENCE TO RELATED APPLICATIONS
[0001] This patent application claims priority from U.S. provisional patent application Ser. No. 61 / 361,626 filed Jul. 6, 2010, which is incorporated herein by reference in its entirety.BACKGROUND OF THE INVENTION
[0002] Flash memory devices may store information in the form of an electrical charge which may be programmed into cells by injecting electrons between electrically isolated floating-gates of the cells, where the electrons may be trapped by the insulating properties of the floating-gates. In single-level cell (SLC) devices, each cell may either be programmed with charge or may remain un-programmed (erased), thus effectively defining two binary states to store one bit of information per cell. Multi level cell (MLC) devices may store more than one bit per cell by applying electrical charge to the floating gates in one of multiple (n) levels. Thus, an (n)-level flash cell, where n=2̂k, may store k bits of information, where each combination of k ...