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Design Tools For Converting a FinFet Circuit into a Circuit Including Nanowires and 2D Material Strips

a technology of nanowires and design tools, applied in the direction of cad circuit design, nanoinformatics, instruments, etc., can solve the problems of complex reconfiguration of fins or other structures, labor-intensive process of designing cells to be specified in cell libraries, etc., and achieve different performance characteristics of cells and gradations of drive power

Inactive Publication Date: 2016-11-17
SYNOPSYS INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The patent describes a method for designing circuits using nanowires or 2D material strips. The design includes transistors and interconnects. The transistors have a specific arrangement of nanowires or 2D material strips, which can be different between cells. This allows for finer control of drive power and performance characteristics. The resulting circuit has improved performance and can be used in common circuits that have different performance characteristics in each cell.

Problems solved by technology

The procedure of designing cells to be specified in a cell library is often a labor-intensive process, requiring highly skilled designers to manually design and refine the designs of the cells.
To fine tune finFET type circuits, complex reconfiguration of the fins or other structures may be required.

Method used

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  • Design Tools For Converting a FinFet Circuit into a Circuit Including Nanowires and 2D Material Strips
  • Design Tools For Converting a FinFet Circuit into a Circuit Including Nanowires and 2D Material Strips
  • Design Tools For Converting a FinFet Circuit into a Circuit Including Nanowires and 2D Material Strips

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Embodiment Construction

[0070]A detailed description of embodiments of the present invention is provided with reference to the Figures. The following description will typically be with reference to specific structural embodiments and methods. It is to be understood that there is no intention to limit the invention to the specifically disclosed embodiments and methods but that the invention may be practiced using other features, elements, methods and embodiments. Preferred embodiments are described to illustrate the present invention, not to limit its scope, which is defined by the claims. Those of ordinary skill in the art will recognize a variety of equivalent variations on the description that follows. Like elements in various embodiments are commonly referred to with like reference numerals.

[0071]FIGS. 1A and 1B illustrate complementary finFET blocks in which finFET transistors can be arranged to implement cells. The cells can be in a flexible finFET cell library. FIG. 1A shows a top view of a finFET st...

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Abstract

An integrated circuit design tool includes a cell library. An entry in the cell library comprises a specification of the cell including a first transistor and a second transistor. The first transistor can include a first set of nanowires or 2D material strips arranged in parallel to form a channel structure, and a gate conductor disposed across the first set of nanowires or 2D material strips. The second transistor can include a second set of nanowires or 2D material strips arranged in parallel to form a channel structure, and a gate conductor disposed across the first set of nanowires or 2D material strips. The number of nanowires or 2D material strips in the first set can be different from the number of nanowires or 2D material strips in the second set, so that the drive power of the individual transistors can be set with finer granularity.

Description

PRIORITY APPLICATIONS[0001]This application is a continuation of U.S. patent application Ser. No. 14 / 312,040, filed 23 Jun. 2014 entitled “Design Tools for Integrated Circuit Components Including Nanowires and 2D Material Strips,” by Victor Moroz and Jamil Kawa (Atty. Docket No.: SYNP 2469-1). This application is incorporated herein by reference.BACKGROUND[0002]1. Field of the Invention[0003]The present invention relates to integrated circuit devices, cell libraries, cell architectures and electronic design automation tools for integrated circuit devices.[0004]2. Description of Related Art[0005]In the design of integrated circuits, standard cell libraries are often utilized. The process of designing the cells specified by entries in the cell libraries can be intensive, where trade-offs among variables such as the size of the cells, the drive power of the cells, the speed of the cells and so on, are made by adjusting the materials, geometry and size of the components of the cell. The...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06F17/50H10B10/00
CPCG06F17/5077G06F17/5072B82Y10/00H01L21/823807H01L21/823885H01L29/42392H01L27/0207H01L29/775H01L27/092H01L27/0924H01L27/1203H01L27/1211H01L29/0673H01L29/0676H01L29/78642H01L27/1214G06F30/392G06F30/39G06F2111/14H10B10/12H01L29/7827H01L21/84
Inventor MOROZ, VICTORKAWA, JAMIL
Owner SYNOPSYS INC
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