Electronics package having a multi-thickness conductor layer and method of manufacturing thereof

Abstract

An electronics package includes an insulating substrate and electrical components coupled to a first surface of the insulating substrate. A multi-thickness conductor layer is formed on a second surface of the insulating substrate opposite the first surface. The multi-thickness conductor layer extends through vias in the insulating substrate to connect with contact pads of the electrical components. The multi-thickness conductor layer has a first thickness in a region proximate the first electrical component and a second thickness in a region proximate the second electrical component, the first thickness greater than the second thickness. The electronics package also includes a first redistribution layer having a conductor layer formed atop a portion of the multi-thickness conductor layer having the second thickness. A top surface of the conductor layer is co-planar with or substantially co-planar with a top surface of a portion of the multi-thickness conductor layer having the first thickness.

Description

BACKGROUND OF THE INVENTION[0001]Embodiments of the invention relate generally to semiconductor device packages or electronics packages and, more particularly, to an electronics package that includes a conductor layer with locally varied thicknesses. This multi-thickness conductor layer combines high current carrying capabilities and a high density interconnection structure into a common horizontal plane, which facilitates the integration of different types of electronics devices in a miniaturized package topology.[0002]As semiconductor device packages have become increasingly smaller and yield better operating performance, packaging technology has correspondingly evolved from leaded packaging, to laminated-based ball grid array (BGA) packaging, to chip scale packaging (CSP), then flipchip packages, and now buried die / embedded chip build-up packaging. Advancements in semiconductor chip packaging technology are driven by ever-increasing needs for achieving better performance, greater...

AI Technical Summary

Benefits of technology

This patent describes an electronics package that includes an insulating substrate and two electrical components. A multi-thickness conductor layer is formed on the substrate to connect with the two components, and a first redistribution layer is added on top of the conductor layer to make electrical connections. The conductor layer has different thicknesses in different regions to ensure optimal performance. The technical effect of this design is to improve the efficiency and performance of the electronics package.

Problems solved by technology

A challenge to existing manufacturing techniques is the miniaturization of electronics packages that incorporate different types of individually packaged semiconductor dies that have different current carrying and routing density requirements, such as a mixture digital semiconductor devices and power semiconductor devices.

However, inclusion of multiple routing layers adds considerable thickness to the overall electronics package, a factor that in combination with the complex conductor structure, limits product level miniaturization, design flexibility, and cost efficiency.

Additionally, both of the aforementioned techniques include multiple routing layers, which results in a long and complex conductor structure between electrical components and weakens the electrical performance of the overall package, which is increasingly unfavorable in high performance packaging (e.g., high frequency, RF, intelligent power, and other advanced electronics packaging).

Images