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Low gate current junction field effect transistor device architecture

a transistor and junction field technology, applied in the direction of semiconductor devices, basic electric elements, electrical equipment, etc., can solve the problem of depletion of the top ga

Pending Publication Date: 2019-05-02
ANALOG DEVICES INT UNLTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This patent describes a type of transistor called a junction field effect transistor (JFET). The JFET has three main regions: a source region, a drain region, and a channel in between. The top gate is made to be very lightly doped, which depletes it during use. The first and second regions are positioned close to the top gate or are separated from it by less than double the depth of the top gate. There is also a third region that is opposite the second region and is doped with the same type of dopant. This third region helps to keep the current carriers away from the edges of the top gate, which reduces the likelihood of impact ionization and avoids excess gate current. Overall, this structure prevents damage to the transistor and ensures it operates correctly.

Problems solved by technology

As a result, during use the top gate becomes depleted.

Method used

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  • Low gate current junction field effect transistor device architecture
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  • Low gate current junction field effect transistor device architecture

Examples

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Embodiment Construction

[0023]In the Figures some of the device structures, such as regions of doped material are delimited by lines. These boundaries are representative only and it should be appreciated that the doping concentration may vary over a distance giving rise to a blurring of the transition between P type and N type regions rather that giving rise to a distinct boundary.

[0024]Terms such as “above”, “below”, “to the right hand side of” and the like refer to the relative placement of features in the drawings when the drawings are in an upright orientation. Such terms are not limiting of the positions of components or regions within a device in accordance with the teachings of this disclosure unless the device has been orientated so as to match the orientation of an equivalent one of the drawings.

[0025]Despite the apparent disadvantages of the JFET in terms of its ability to draw an additional gate current compared to a MOSFET as set out above, it still remains in use because the JFET can offer bet...

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Abstract

A JFET is provided with a very low gate current. In tests the excess gate current above the theoretical minimum current for a similarly sized reverse biased p-n junction was not observed. The JFET includes a lightly doped top gate and doped regions beneath the drain of the JFET.

Description

FIELD OF DISCLOSURE[0001]The present disclosure relates to an improved architecture for junction field effect transistors, JFETs, which reduces excess gate current of a JFET, such that the gate current substantially matches the reverse bias diode current that would be expected from the reverse current flow of a reverse biased p-n junction.BACKGROUND[0002]Broadly speaking field effect transistors, FETs, modulate the width of a “channel” region of semiconductor in order to vary the magnitude of current flowing between current flow terminals of the device. These terminals are known as a drain and a source of the FET.[0003]The current is modulated by subjecting the channel region to an electric field which can alter the size of depletion regions with the FET. The electric field is generated by applying a voltage to a “gate” of the FET. The gate region is insulated from the channel. The way in which the isolation is achieved can be used to classify FETs.[0004]In one class of FET, the gat...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L29/10H01L29/78H01L29/808H01L29/06H01L29/66
CPCH01L29/1083H01L29/7832H01L29/808H01L29/0653H01L29/66901H01L29/66484H01L29/0607H01L29/0688H01L29/1066H01L29/1058
Inventor COYNE, EDWARD JOHN
Owner ANALOG DEVICES INT UNLTD
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