Semiconductor device and manufacturing method thereof
a technology of semiconductor devices and semiconductors, applied in semiconductor devices, semiconductor/solid-state device details, electrical apparatus, etc., can solve the problems of affecting the manufacturing yield and complicating the process of forming the contact structur
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first embodiment
[0016]Please refer to FIG. 1. FIG. 1 is a schematic drawing illustrating a semiconductor device according to the present invention. As shown in FIG. 1, a semiconductor device 101 is provided in this embodiment. The semiconductor device 101 includes a substrate 12, a gate structure 24, a source / drain region 26, a contact opening 32, an etching stop layer 34, an interlayer dielectric layer 36, and a first contact structure 40A. The substrate 12 includes a buried insulation layer 14, a semiconductor layer 16, and an isolation structure 18. The semiconductor layer 16 is disposed on the buried insulation layer 14. The isolation structure 18 is disposed in the semiconductor layer 16. The gate structure 24 is disposed on the semiconductor layer 16. The source / drain region 26 is disposed in the semiconductor layer 16. The contact opening 32 penetrates at least a part of the substrate 12, and at least a part of the contact opening 32 is disposed above the buried insulation layer 14. The etch...
second embodiment
[0038]Please refer to FIGS. 11-14. FIGS. 11-14 are schematic drawings illustrating a manufacturing method of a semiconductor device 102 according to the present invention, wherein FIG. 12 is a schematic drawing in a step subsequent to FIG. 11, FIG. 13 is a schematic drawing in a step subsequent to FIG. 12, and FIG. 14 is a schematic drawing in a step subsequent to FIG. 13. As shown in FIG. 11, in some embodiments, the contact opening 32 may penetrate the first protection layer 28, the semiconductor layer 16 (such as the second portion 16B of the semiconductor layer 16), and the buried insulation layer 14 in the first direction D1 and expose a part of the first supporting substrate 10. In this circumstance, the sidewall 32S of the contact opening 32 may include a sidewall 14S of the buried insulation layer 14, the sidewall 16S of the semiconductor layer 16, and a sidewall of the first protection layer 28, and the bottom 32B of the contact opening 32 may be a surface of the first supp...
third embodiment
[0040]Please refer to FIGS. 15-17. FIGS. 15-17 are schematic drawings illustrating a manufacturing method of a semiconductor device 103 according to the present invention, wherein FIG. 16 is a schematic drawing in a step subsequent to FIG. 15, and FIG. 17 is a schematic drawing in a step subsequent to FIG. 16. As shown in FIG. 15 and FIG. 16, in some embodiments, the contact opening 32 may penetrate the first protection layer 28 and the isolation structure 18 in the first direction D1 and expose a part of the buried insulation layer 14. In this circumstance, the sidewall 32S of the contact opening 32 may include a sidewall 18S of the isolation structure 18 and the sidewall of the first protection layer 28, and the bottom 32B of the contact opening 32 may be a surface of the buried insulation layer 14, but not limited thereto. In some embodiments, the contact opening 32 may penetrate the first protection layer 28, the isolation structure 18, and the buried insulation layer 14 and exp...
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Abstract
Description
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