Nonvolatile semiconductor storage device including a plurality of memory strings
a nonvolatile, memory string technology, applied in the direction of semiconductor devices, basic electric elements, electrical appliances, etc., can solve the problems of high cost unrealistic introduction of euv exposure devices, and becoming difficult to realize miniaturization from the viewpoint of cost and techniqu
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first embodiment
Configuration of Nonvolatile Semiconductor Storage Device 100 in First Embodiment
[0039]FIG. 1 is a schematic diagram of a nonvolatile semiconductor storage device 100 as a first embodiment of the present invention. As shown in FIG. 1, the nonvolatile semiconductor storage device 100 of the first embodiment mainly has a memory transistor region 12, a word line drive circuit 13, a source-side selection gate line (SGS) drive circuit 14, a drain-side selection gate line (SGD) drive circuit 15, and a sense amplifier 16. The memory transistor region 12 has a memory transistor for storing data. The word line drive circuit 13 controls voltage to be applied to word lines WL. The source-side selection gate line (SGS) drive circuit 14 controls voltage to be applied to a source-side selection gate line SGS. The drain-side selection gate line (SGD) drive circuit 15 controls voltage to be applied to a drain-side selection gate line (SGD). The sense amplifier 16 senses current (or potential) in th...
second embodiment
Concrete Configuration of Nonvolatile Semiconductor Storage Device in Second Embodiment
[0118]A concrete configuration of a nonvolatile semiconductor storage device as a second embodiment of the invention will be described with reference to FIG. 23. In the second embodiment, the same reference numerals are designated to components similar to those of the first embodiment, and their description will not be repeated.
[0119]As shown in FIG. 23, the nonvolatile semiconductor storage device of the second embodiment has, in the memory transistor region 12, a source-side selection transistor layer 20a and a drain-side selection transistor layer 40a which are different from those of the first embodiment. The nonvolatile semiconductor storage device of the second embodiment has, in the periphery region Ph, a peripheral transistor layer 70a different from that of the first embodiment.
[0120]The drain-side selection transistor layer 40a has a drain-side metal layer 43a in place of the drain-side ...
third embodiment
Concrete Configuration of Nonvolatile Semiconductor Storage Device in Third Embodiment
[0125]A concrete configuration of a nonvolatile semiconductor storage device as a third embodiment of the invention will be described with reference to FIG. 24. In the third embodiment, the same reference numerals are designated to components similar to those of the first embodiment, and their description will not be repeated.
[0126]As shown in FIG. 24, the nonvolatile semiconductor storage device of the third embodiment has, in the memory transistor region 12, the source-side selection transistor layer 20, the memory transistor layer 30, a drain-side selection transistor layer 40a, and the wiring layer 50 which are sequentially stacked on the semiconductor substrate Ba. The nonvolatile semiconductor storage device of the third embodiment has, in the periphery region Ph, the peripheral transistor layer 70. That is, the nonvolatile semiconductor storage device of the third embodiment has the characte...
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