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Dynamic performance adjustment of computation means

a computation means and dynamic technology, applied in the field of computer performance maximization, can solve the problems of other tasks performed by logic circuits that have relatively longer time limitations, and achieve the effects of flexible power conservation, longer time limitations, and longer timing tolerances

Inactive Publication Date: 2014-03-11
QUALCOMM INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The system effectively conserves power by dynamically adjusting processor performance to match task demands, reducing energy consumption and extending battery life while ensuring seamless operation without manual user intervention.

Problems solved by technology

For example, some tasks performed by the logic circuit are required to be performed in a relatively short duration and other tasks performed by logic circuit have relatively longer time limitations.

Method used

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  • Dynamic performance adjustment of computation means
  • Dynamic performance adjustment of computation means
  • Dynamic performance adjustment of computation means

Examples

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Embodiment Construction

[0025]Reference will now be made in detail to the preferred embodiments of the invention, a system and method to dynamically adjust the performance of a processor, examples of which are illustrated in the accompanying drawings. While the invention will be described in conjunction with the preferred embodiments, it will be understood that they are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents, which may be included within the spirit and scope of the invention as defined by the appended claims. Furthermore, in the following detailed description of the present invention, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be obvious to one ordinarily skilled in the art that the present invention may be practiced without these specific details. In other instances, well known methods, procedures, components...

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PUM

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Abstract

A dynamic performance circuit adjustment system and method that flexibly adjusts the performance of a logic circuit. The dynamic performance circuit adjustment system and method facilitates flexible power conservation. In one exemplary implementation, a dynamic performance adjustment control circuit controls performance adjustments to a logic circuit (e.g., a processor) and adjusts support functions for the logic circuit. The logic circuit performs operational functions (e.g., processing) or tasks that have different performance requirements. For example, some tasks performed by the logic circuit are required to be performed in a relatively short duration of time and other tasks performed by logic circuit have relatively longer time limitations. The dynamic performance adjustment control circuit adjusts the clock frequency and voltage at which the logic circuit operates to a relatively greater frequency and voltage for tasks required to be performed in a shorter duration of time and adjusts the frequency and voltage at which the logic circuit operates to a relatively lower frequency and voltage for tasks with longer timing tolerances. The dynamic performance adjustment system and method includes provisions to manage a transition in performance and support functions in a manner that reduces the risk of spurious signals or “glitches.”

Description

[0001]Notice: More than one reissue application has been filed for the reissue of U.S. Pat. No. 6,721,892. The reissue applications are application Ser. No. 11 / 403,243 filed on Apr. 12, 2006 and is a parent reissue application of U.S. Pat. No. 6,721,892, and application Ser. No. 12 / 221,187 (the present application) filed on Jul. 30, 2008 and is a continuation reissue application of parent reissue application Ser. No. 11 / 403,243 filed Apr. 12, 2006 now U.S. Pat. No. Re. 40,473 of U.S. Pat. No. 6,721,892.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]This invention relates to the field of computer performance maximization. More particularly, the present invention relates to managing processor performance in a handheld computer with a flexible control system and method that is dynamically adaptable to achieve conservation of limited energy and power resources.[0004]2. Related Art[0005]Electronic systems and circuits have made a significant contribution towards the adva...

Claims

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Application Information

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Patent Type & Authority Patents(United States)
IPC IPC(8): G06F1/26G06F1/32
CPCG06F1/3203G06F1/324G06F1/329G06F1/3296Y02B60/1217Y02B60/1285Y02B60/144Y02D10/00
Inventor OSBORN, NEAL A.CANOVA, FRANCIS J.
Owner QUALCOMM INC