Method for realizing kernel-mode programe verification in user-mode random verification of microprocessor

A random verification, microprocessor technology, applied in the field of core state program verification, can solve the problems of complex combination of core state instructions and control register states, inability to complete the full verification of processor core state instructions, and difficulty in uniform coverage of handwritten test vectors, etc. To achieve the effect of comprehensive verification, high efficiency and high verification efficiency

A random verification, microprocessor technology, applied in the field of core state program verification, can solve the problems of complex combination of core state instructions and control register states, inability to complete the full verification of processor core state instructions, and difficulty in uniform coverage of handwritten test vectors, etc. To achieve the effect of comprehensive verification, high efficiency and high verification efficiency

CN100405324CActive Publication Date: 2008-07-23LOONGSON TECH CORP
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  • Method for realizing kernel-mode programe verification in user-mode random verification of microprocessor
  • Method for realizing kernel-mode programe verification in user-mode random verification of microprocessor
  • Method for realizing kernel-mode programe verification in user-mode random verification of microprocessor

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Embodiment Construction

[0045] Below in conjunction with accompanying drawing and specific embodiment the present invention is described in further detail:

[0046] like figure 2 Shown, a kind of method that realizes kernel state program verification in microprocessor user state random verification, comprises the following steps:

[0047] Step 1, add exception handling-related constraints in the instruction template, including the type and number of exception handling allowed;

[0048] Step 2, improve the instruction-level random verification generation engine, increase the number of TLB items, change the termination condition of the original instruction sequence generation, and ensure that the two instructions at the end of the instruction sequence are SYSCALL;

[0049] Step 3, add the execution mechanism of the core state instructions Trap, System Call, and Breakpoint to the instruction-level processor simulator, set the registers according to the instruction manual, and provide correct results w...

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Abstract

The present invention discloses method for realizing kernel mode program verification method in microprocessor user status random verifying. Said method includes 1, adding exception handling correlative restriction in instruction stencil-plate; 2, improving instruction grade random verifying generation engine; 3, adding kernel mode instruction execution mechanism instruction grade processor simulator, setting register, providing right result in system running kernel mode instruction; 4, adding step 1 added correlative restrictive filtering unit in instruction filter; 5, adding abnormal monitoring logic and control register updating logical in emulation environment; 6, pre-storing exception handler in emulation environment provided memory. The present invention has advantages of complete verifying and high verifying efficiency.

Description

technical field [0001] The microprocessor verification technology of the present invention particularly relates to a method for realizing program verification of a core state in random verification of a microprocessor user state. Background technique [0002] Analog emulation is a common method for processor verification. Extensive coverage of test vectors is very important when performing simulations. A variety of methods can be used to generate test vectors, among which the main methods include instruction set random test generation, hand-written test vectors and application program encapsulation. [0003] Many RISC architecture processors can run instructions in multiple modes, and use different address spaces according to different operating modes. Taking MIPS CPU as an example, a MIPS CPU can run instructions in two priority levels: user mode and kernel mode. Taking MIPS R4000 as an example, the available space of user mode in 32-bit mode is 0x00000000~0x7fffffff, a ...

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Application Information

Patent Timeline
23 Jul 2008
Publication
CN100405324C
IPC
G06F11/36
Inventors
沈海华; 胡伟武