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Function and instruction number reduced microprocessor

A technology of microprocessors and instructions, applied in the field of microprocessors with reduced functions and instructions, can solve the problems of large chip area, huge number of instructions, occupation, etc., to achieve the effect of simplifying the circuit, easy to calculate the program execution, and reducing the area

Inactive Publication Date: 2008-09-17
SINO WEALTH ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although this design method can provide many functions, relatively speaking, the number of instructions is quite large, and it will occupy a large chip area.

Method used

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  • Function and instruction number reduced microprocessor
  • Function and instruction number reduced microprocessor
  • Function and instruction number reduced microprocessor

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Embodiment Construction

[0052] Please refer to FIG. 1 , which is a functional block diagram of a microprocessor 10 with reduced functions and instruction numbers according to an embodiment of the present invention. The microprocessor 10 is a 4-bit microprocessor. The microprocessor 10 includes a sequential circuit 102, a program counter 104, a stack circuit 106, a decoding circuit 108, a latch circuit 110, an arithmetic logic unit 112, an accumulator 114 and a carry circuit 116, an indirect addressing circuit 118, an interrupt circuit 120, and a list jump buffer 122 . Microprocessor 10 is to transmit data by ROM data address bus RB 124, random access memory data bus BB126, data input bus AB 128, and data output bus QB 130, and by ROM data address bus RB 124 and Random access memory address bus RAMAR 132 to transfer addresses. Wherein, the read-only memory data address bus RB 124 with the width of 16 bits (that is, RB0_RB15) is shared by both the data bus and the address bus, and the different timin...

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Abstract

The ivnention is a function and instruction number simplified microprocessor, including time sequence circuit, program counter, stack circuit, decoding circuit, latching circuit, ALU, accumulator and carry circuit, indirect addressing circuit, interrupt circuit, and list rank jumping storage buffer. It adopts external 16-bit ROM and 4-bit RAM, and the ROM only stores an instruction, which contains operating code and operand, thus simplifying the scale of decoding circuit and address. It only adopts 43 single character sets and single-instruction period, easy to calculate the running time of the program.

Description

technical field [0001] The present invention relates to a microprocessor, and more particularly to a microprocessor capable of reducing chip area and reducing the number of functions and instructions. Background technique [0002] Microcontrollers (MCUs) can be divided into 4-bit microcontrollers, 8-bit microcontrollers, 16-bit microcontrollers, and 32-bit microcontrollers according to the width of the internal microprocessor (MPU) data bus. These microcontrollers can work at different voltages and frequencies, and can be combined into various single chips with various external circuits. These various single chips can be applied in various occasions. Generally speaking, the relative price of an integrated circuit with powerful functions and good performance will be higher, and the size of the chip will also increase with the increase of functions and performance. For consumer electronic products such as calculators, toys, small appliances, etc., low price is very important...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/22
Inventor 王晓艳计万里
Owner SINO WEALTH ELECTRONICS
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