Efficiency execution method for load adjusting device

A load device and performance technology, applied in energy-saving computing, energy-saving ICT, sustainable buildings, etc., can solve problems such as power consumption, single-voltage overclocking mode, and inability to achieve system stability.

Inactive Publication Date: 2008-10-15
FEATURE INTEGRATION TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Since the execution performance of the central processing unit 11 is directly adjusted by the BIOS to set these devices 12, the adjustment device 12 can be a frequency regulator or a voltage regulator, and then controls the clock generator 13 and the voltage controller 14 to the central processing unit. The device 11 performs the execution performance adjustment action of overvoltage overclocking or frequency reduction and voltage reduction, such as Figure 2a As shown, when the known technology intends to overclock the central processing unit 11, due to the need for a stable overclocking characteristic in order to cooperate with the central processing unit 11 itself, the central processing unit 11 must be overstressed and then overclocked, so the known technology Usually when the system is started, the BIOS has been set to overvoltage, and this pre-overvoltage action is used to meet the subsequent overclocking requirements. However, since the voltage of the system is in an overvoltage state after booting, this known method will cause Unnecessary power consumption, and even if the central processing unit 11 does not perform overclocking, the voltage cannot be reduced back to the non-overvoltage state. Moreover, this known technical method is a single voltage overclocking mode, so it cannot be used in the same system. According to the system execution requirements of the central processing unit 11 at different times, the execution performance is changed. In addition to being unable to reduce energy consumption, the possibility of damage to the central processing unit 11 is more likely to be caused by long-term overpressure. Inconvenience
[0004] Figure 2b Described is known technology after detecting the load state of central processing unit 11, intends to carry out the performance adjustment action of lowering the frequency of its central processing unit 11, and in order to cooperate with the characteristic of stable frequency reduction of central processing unit 11, so it must be lowered first. The frequency is lowered again, but the known technology is to protect the system from running stably before the frequency is lowered. Therefore, when the system is turned on, the voltage is set through the BIOS without any adjustment, because if the voltage is lowered, the CPU 11 When the frequency has not been lowered or when the frequency is lowered, the system may be unstable or crashed, and the requirement of maintaining system stability cannot be achieved. Therefore, the known technology cannot dynamically reduce the frequency and voltage of the central processing unit 11, and if only Reducing the frequency to achieve the purpose of power saving has a limited effect, which cannot meet the needs of users and cause troubles in use.

Method used

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  • Efficiency execution method for load adjusting device
  • Efficiency execution method for load adjusting device
  • Efficiency execution method for load adjusting device

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Embodiment Construction

[0043] For the first preferred embodiment of the method for adjusting the execution performance of the load device of the present invention, please refer to image 3 The system block diagram shown, which is used in conjunction with the method of the present invention, such as image 3As shown, the current load detection device 32 can adjust the load device (eg, the central processing unit 311 ) according to the change of the load signal, such as the PWM duty cycle signal, the high gate control signal Ugate, or the low gate control signal Lgate. For performance execution, this embodiment takes the PWM duty cycle signal as an example. The PWM controller 35 outputs a PWM duty cycle signal to the current load detection device 32 according to the change of the load state of the central processing unit 311. In this embodiment Among them, the PWM duty cycle signal is obtained by the PWM controller 35 adjusting the high / low level maintenance time of the PWM signal according to the cha...

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Abstract

The present invention refers to method for adjusting load device executing efficiency, it contains one detecting device picking up actual load correspondent load signal, comparing said load signal with predetermined super-frequently critical value or lower frequently critical value, and then according to compared result to control load device time-pulse signal and operating voltage input, for adjusting load device dynamical overvoltage super-frequently or lower frequently reduction voltage executing efficiency, to make total system more stabilizing, duo the critical configuration, to make system load device capable of making correspondent regulation when being in super-frequently or lower frequently regulation. Therefore the present invention not only can exert maximal executing efficiency and reduce system energy source wastage, but also raise system dynamical overvoltage super-frequently / lower frequently reduction voltage stability.

Description

technical field [0001] The present invention relates to a system and a method for adjusting the execution performance of a load device, which can dynamically adjust the execution performance of the load device in a steady state according to a load signal. Background technique [0002] like figure 1 As shown, in the detection circuit of the known performance of the load device, the power supply 17 is used to input alternating current with a high voltage level (for example: 110 volts) and output a low voltage level (for example: 12 volts). DC power is used to supply the power required for the operation of the load device (eg, the CPU 11 ), because the voltage level (eg, 1.3 volts) required by the CPU 11 to consume power is higher than the voltage provided by the power supply 17 The bit is low, so the energy storage capacity of the energy storage inductor 18 and the energy storage capacitor 19 is used in conjunction with the PWM controller 15 to control the high gate control s...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F1/32
CPCY02B60/1228Y02D10/00
Inventor 陈赠文黄俊淦
Owner FEATURE INTEGRATION TECH INC
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