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Technology method of anti-ESD integrated SOI LIGBT device unit

A process method and device technology, applied in the field of SOI CMOSVLSI process realization, can solve the problems of increasing volume, weight and cost, reducing reliability, etc., and achieve the effect of improving anti-ESD performance and excellent anti-ESD performance

Inactive Publication Date: 2008-11-12
HAIAN TIANRUN MACHINERY TECH
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  • Summary
  • Abstract
  • Description
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AI Technical Summary

Problems solved by technology

At present, commercialized SOIL IGBT devices need external discrete Zener diodes for protection, which increases volume, weight and cost, and reduces reliability.

Method used

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  • Technology method of anti-ESD integrated SOI LIGBT device unit
  • Technology method of anti-ESD integrated SOI LIGBT device unit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0026] like figure 1 and figure 2 As shown, the SOICMOS VLSI process implementation method of the SOI LIGBT device structure of the integrated anti-ESD diode comprises the following steps:

[0027] 1. Form a buried insulating layer at a certain depth below the surface of one side of a silicon wafer of a certain conductivity type, and completely isolate the silicon wafer into two semiconductor regions, of which the thicker side is used as the substrate, and the thinner side is used as the substrate. One side has a certain conductivity type and doping concentration distribution, which is used as the top silicon film for making devices and circuits.

[0028] 2. The polished top silicon film is oxidized for the first time, nitrided for the first time, and etched for the first time to form an isolation area window, and the silicon film in the isolation area is formed by STI (shallow trench isolation technology) / DTI (deep trench isolation technology) to form an isolation oxide la...

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Abstract

This invention relates to a realization method for SOL CMOS VLSI technology of an integrated SOL LIGBT device structureof anti-ESD , which, changes the local isolation technology in the method of realizing SOL CMOS VLSI for routine SOL LIGBT devices to slot isolation technology to realize silicon island isolation, adjusts the trap doping to converse doped distribution, carries out anode short circuit point doping and anti-ESD diode cathode dope at the same time when doping in the N+ source region and carries out p-type dope of rather low concentration in the anode region before doping at the P+ source region and the anode region to increase the integration power and anti-ESD performance of the RF SOI LIGBT parts.

Description

technical field [0001] The invention relates to an SOI CMOSVLSI process realization method of an SOI LIGBT device structure integrating anti-ESD diodes. Background technique [0002] Due to its small size, weight, high operating temperature and strong radiation resistance, low cost and high reliability, SOI LIGBT devices are used as non-contact power electronic switches or power drivers in smart power It is widely used in electronics, high temperature environment power electronics, space power electronics and vehicle power electronics. SOI CMOS VLSI process technology has advantages such as high process maturity, good dielectric isolation performance, simple isolation process, easy three-dimensional integration, easy integration of micro-optical electromechanical and power and radio frequency monolithic systems, and easy improvement of integration density and integration performance. VLSI manufacturing, SOC (Single Chip Integrated System) manufacturing, SPIC (Smart Power In...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/84H01L21/331
Inventor 张海鹏徐文杰许杰萍孙玲玲高明煜徐丽燕
Owner HAIAN TIANRUN MACHINERY TECH
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