Centralized scheduling controller for intelligent multi buffer management and dynamic scheduting method

A multi-buffer, centralized scheduling technology, applied in the field of microelectronics, can solve problems such as inability to adapt to demand, and achieve the effects of reducing inability to respond, ensuring bandwidth requirements, and improving throughput and storage resource utilization.

Inactive Publication Date: 2009-06-24
FUDAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] In the current SOC system, there are generally multiple buffers in the data communication part, and the typical buffer solution can no longer meet the needs of the existing system

Method used

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  • Centralized scheduling controller for intelligent multi buffer management and dynamic scheduting method
  • Centralized scheduling controller for intelligent multi buffer management and dynamic scheduting method
  • Centralized scheduling controller for intelligent multi buffer management and dynamic scheduting method

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Embodiment Construction

[0034] Specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0035] image 3 It is the system structural diagram that the centralized scheduling controller of intelligent multi-buffer management of the present invention is connected with other modules of the system, and the connection relationship between the centralized scheduling controller (302) and each module of the system is as follows:

[0036] With the external data receiving and sending unit (301): the external data receiving and sending unit can send a read or write access request to the centralized scheduling controller, and after the request of the external data receiving and sending unit is authorized, it can indicate what it wants through the endpoint input the accessed buffer;

[0037] With the internal data sending and receiving unit (303): the internal data receiving and sending unit can send a read or write access request to the central...

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Abstract

Multiple buffer areas are realized by a piece of sharing memory unit in hardware, and managed by unified access arbitrator and allocation table of buffer area in order to provide high performance multiple buffer areas for buffer area access unit. When buffer areas are requested to access, the access arbitrator determines whether there is space allowed to assigning to buffer area requested first based on allocation table; if yes, the access is authorized, and corresponding update is made for the allocation table of buffer area. Buffer area is recovered in real time after its use is ended. The invention raises use ratio of whole memory unit, real time operation and throughput of buffer area.

Description

technical field [0001] The invention belongs to the technical field of microelectronics, and in particular relates to a centralized scheduling controller for multi-buffer management, in particular to a centralized scheduling for intelligent multi-buffer management and a dynamic scheduling method for performance optimization. Background technique [0002] In traditional data communication systems, there are generally multiple send and receive buffers. The sending buffer is used to temporarily store the data to be sent. After the sender sends the last data, it can get the data from the sending buffer and send it immediately without waiting for the data source to provide data. If the sending buffer is empty, then Indicates that there is currently no data to send. The receiving buffer temporarily stores the data received by the data receiving device to provide fast storage space, because it often takes longer to take out the data than to receive the data. If the received data c...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/54G06F12/08G06F12/0831H04L12/861
Inventor 周维周晓方孙承绶
Owner FUDAN UNIV
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