Communication method between two processors
A dual-processor, communication method technology, applied in the direction of electrical digital data processing, instruments, computers, etc., can solve the problems of poor flexibility and versatility, increase the difficulty and cost of hardware design, achieve real-time communication, shorten integration and transplantation cycle, the effect of isolating differences
Active Publication Date: 2009-07-08
SANECHIPS TECH CO LTD
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However, this method also needs to design a special bus control circuit to realize the time-sharing access of the two processors to the DPRAM.
This increases the difficulty and cost of hardware design, and the flexibility and versatility are poor
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[0021] The basic idea of the present invention is that in a system including processor A and processor B, processor B triggers the interrupt of processor A twice at a fixed time interval, and after the interrupt is triggered, processor A and processor B simultaneously A read or write operation is performed on a specific area of the DPRAM to realize two-way data and message communication between processor A and processor B during the time interval.
[0022] The present invention will be described in detail below with reference to the drawings and embodiments.
[0023] figure 1 It is a schematic diagram of the structure of a dual-processor system communicating through DPRAM, such as figure 1 As shown, the system includes processor A, processor B and DPRAM. Wherein, processor A and processor B are connected with DPRAM by address and data bus. In addition, there is an interrupt control line between processor A and DPRAM.
[0024] Among them, processor A is usually an embed...
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A communication method between dual processors, which divides 4 non-overlapping storage areas in DPRAM: the first storage area, the second storage area, the third storage area and the fourth storage area; the second processor alternates periodically Trigger the interrupt of the first processor: the first interrupt and the second interrupt; after triggering the first interrupt and before triggering the second interrupt, the second processor reads the communication data saved in the first storage area and saves it in the third storage area area writes communication data; as a response to the first interrupt, the first processor writes communication data in the second storage area, and reads the communication data stored in the fourth storage area; after triggering the second interrupt, triggers the second Before an interruption, the second processor reads the communication data stored in the second storage area, and writes the communication data in the fourth storage area; as a response to the second interruption, the first processor writes in the first storage area communication data, and read the communication data saved in the third storage area.
Description
technical field [0001] The invention relates to a multi-processor communication method, in particular to a communication method between dual processors through DPRAM (Dual Port RAM, dual-port random access memory). Background technique [0002] In fields where computer systems are widely used, such as communications and multimedia processing, with the continuous increase in the amount and complexity of processed data, it is difficult for a system including a processor to meet the user's requirements for real-time and processing capabilities. Therefore, large and complex systems often contain two or more processors, each of which performs its own task. In addition, different types of processors are required for different tasks in some systems. For example, the control function and data operation are handed over to different processors for processing, so as to achieve the best system performance. [0003] As a system, multiple processors need to exchange data in real time to...
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IPC IPC(8): G06F15/167G06F13/24
Inventor 吴利予
Owner SANECHIPS TECH CO LTD