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Process for reducing scratches of chemical mechanical polishing of tungsten

A chemical-mechanical and process technology, which is applied in the field of reducing micro-scratch during tungsten chemical-mechanical polishing, can solve the problems of short circuit or open circuit of metal and dielectric layers, affecting the yield of semiconductor process, and reducing product quality.

Inactive Publication Date: 2009-08-26
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

These defects will lead to short circuit or open circuit in the metal dielectric layer, which will affect the yield of the entire semiconductor process.
For example, the CMP process is inherently "dirty", because micro-scratches, in the environment of high temperature and air, will rust between the lines in the subsequent process, reduce product quality (high leakage current), or short circuit

Method used

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  • Process for reducing scratches of chemical mechanical polishing of tungsten
  • Process for reducing scratches of chemical mechanical polishing of tungsten

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Embodiment Construction

[0024] In order to better understand the process of the present invention, an example is given, see Figures 2a-2d.

[0025] As shown in Figure 2a, the semiconductor substrate provided by the present invention includes SiO 2 The dielectric layer 11, the window hole 14 is used to expose the inner metal M012, and the thickness is formed on its surface by LP CVD (low pressure chemical vapor deposition) method. SiN film layer;

[0026] Then carry out conventional processes such as photoresist coating and photolithography, and cover with photoresist 13;

[0027] The next step is MOI'RENCH, with etching method, removes photoresist then, as shown in Figure 2b, window hole 14 has fully met the requirement of making tungsten plug now;

[0028] Next, perform W CVD to deposit a layer of tungsten 40, and fill the window hole to form a tungsten plug 42, as shown in FIG. 2c;

[0029] Then the CMP process, a layer of tungsten 40 on the surface is ground away, such as Figure 2d shown.

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Abstract

A process for reducing micro-scratches of tungsten chemical mechanical grinding, providing a semiconductor substrate, the main steps of making tungsten plugs include photoresist coating, photolithography, etching, depositing tungsten metal by W CVD method, and using W CMP process Grinding off the tungsten metal on the surface to complete the production of the tungsten plug is characterized in that a step of depositing a silicon nitride film is also included before performing photoresist photolithography. Because the WCMP process has a higher selectivity to SiN than to the oxide layer, micro-scratches can be avoided or reduced. In this way, with the SiN film layer, the short circuit of the metal conductive layer can be avoided, and the quality of the product can be well controlled. The process time and cost are greatly saved.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a process for reducing micro-scratches easily generated in the tungsten chemical mechanical polishing (W CMP) process. Background technique [0002] In the semiconductor manufacturing process, CMP (Chemical Mechanical Polishing, chemical mechanical polishing) is an advanced and main process, especially for the surface planarization in the ultra-large integrated circuit manufacturing process, it is an indispensable thin film planarization technology. [0003] In the late 1980s, W CMP, tungsten chemical mechanical polishing technology, was applied to the mass production of memory and logic products to replace the role of dry etching in the tungsten plug (Tungesten Plug) process. and general SiO 2 The biggest difference in CMP is the composition of the slurry used. [0004] The main defects of the CMP process are residual slurry and scratches remaining on the chip surface....

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/321H01L21/302H01L21/318
Inventor 王明卿
Owner SEMICON MFG INT (SHANGHAI) CORP