Metal layer and insulation layer alignment error electricity testing structure in micro-electromechanical device process

Abstract

The invention relates to an electricity test structure for metal layer and insulation layer graphics alignment error in processing of micro-electro-mechanical system components. A metal layer is taken as the base layer to design an alignment error test structure; in the structure, a semiconductor layer includes two rectangular semiconductors which are separated and arranged in parallel, and made of the same material; the positions on a lower insulation layer respectively corresponding to the two semiconductors are provided with a trapezoidal and a rectangular windows, which contact with the semiconductor layer; the connected metal layer formed includes two paralleled metal bars with spacing, one of which is vertically covered on an upper and a lower bottom sides of the trapezoidal window as well as two long sides of the rectangular window, and the other is covered on the obtuse angle part of the trapezoidal window and two long sides of the rectangular window, and cut off in the separation area between the two semiconductors; the two metal bars and the semiconductors between the metal bars form a resistance with connecting wires; when relative deflection exists between the metal layer graphics and the insulation layer graphics, the testing resistance changes, and the error of the metal layer and insulation layer graphics alignment deflection can be obtained.

Description

technical field [0001] The invention relates to a micro-electromechanical system (MEMS) device processing technology, in particular to an electrical test structure for the alignment error of a metal layer and an insulating layer in the processing of a micro-electromechanical device, belonging to the fields of electricity and semiconductors. Background technique [0002] There are many layers of materials in microelectromechanical systems (MEMS) device processing, including both conductive layer materials and insulating layer materials. There is an overlay alignment problem among these material layer patterns, that is, there is a requirement that subsequent material layer patterns be aligned with previous material layer patterns. [0003] The traditional overlay alignment is to adopt the method of mutual nesting of large and small graphics, that is, to design the same graphics of different sizes on different layers with registration requirements, such as "ten" graphics, and a...

AI Technical Summary

Problems solved by technology

At present, electrical parameters, geometric dimension parameters and errors can be extracted by electrical methods, but registration errors cannot be extracted by electrical methods

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