Different conductive layers alignment error electricity testing structure in micromotor system apparatus process

Abstract

The invention relates to an electricity test structure for alignment error of different conducting layer graphics in processing of micro-electro-mechanical system components. A metal layer is taken as the base layer to design an alignment error test structure of all conducting layers; in the structure, a semiconductor layer includes two semiconductors which are separated, made in the same material and in different shapes; one of the semiconductors is trapezoidal and the other is rectangular, which are arranged in parallel; the connected metal layer formed includes two paralleled metal bars with spacing, one of which is vertically covered on an upper and a lower bottom sides of the trapezoidal window as well as two long sides of the rectangular window, and the other is covered on the obtuse angle part of the trapezoidal window and two long sides of the rectangular window, and cut off in the separation area between the two semiconductors; the two metal bars and the semiconductors between the metal bars form a resistance with connecting wires; when relative deflection exists between the metal layer graphics and the insulation layer graphics, the testing resistance changes, and the alignment error of the metal layer relative to the semiconductor material graphics can be obtained.

Description

technical field [0001] The invention relates to a micro-electro-mechanical system (MEMS) device processing technology, in particular to an electrical test structure for alignment errors of patterns of different conductive layers in the processing of micro-electro-mechanical devices, belonging to the fields of electricity and semiconductors. Background technique [0002] Multiple layers of conductive material exist in microelectromechanical systems (MEMS) device processing. For example, Silicon Substrate, Poly1, Poly2, and Metal. Since the material layers are successively deposited on the silicon substrate and the processing is also successive overlaying, there is a requirement that the pattern of the subsequent conductive layer be aligned with the pattern of the previous conductive layer. [0003] The traditional overlay alignment is to adopt the method of mutual nesting of large and small graphics, that is, to design the same graphics of different sizes on different layers...

AI Technical Summary

Problems solved by technology

At present, electrical parameters, geometric dimension parameters and errors can be extracted by electrical methods, but registration errors cannot be extracted by electrical methods

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