Method for verifying flash memory devices

Abstract

A method of verifying a flash memory device includes discharging memory cell strings respectively connected to an even bit line and an odd bit line. Next, a voltage is applied to the memory cell strings respectively connected to the even bit line and the odd bit line, thus precharging the memory cell strings. The memory cell string connected to the even bit line are verified as erased by sensing the status of each memory cell string connected to the even bit line, and the memory cell string connected to the odd bit line are verified as erased by sensing the status of the memory cell string connected to the odd bit line.

Description

technical field [0001] This patent generally relates to a flash memory device, and more particularly, to a method of verifying a flash memory device using a page buffer, in which the verification time for programming or erasing can be reduced and the total driving time can be shortened. Background technique [0002] In recent years, demand has increased for semiconductor memory devices that can be electrically programmed and erased and that do not require a refresh function of rewriting data every once in a while. In addition, in order to develop a memory device having a large capacity capable of storing a large amount of data, a high integration technology of memory cells has been developed. [0003] To increase the integration of memory cells, a NAND flash memory device may have multiple cells that are connected in series to form one string and two strings that share a contact. In a NAND flash memory device, programming and erasing are performed by controlling a threshold...

AI Technical Summary

Problems solved by technology

Therefore, if the erase verification time becomes longer, the total erase time is extended

[0009] Also, when programming, the programming verification time is extended in the same way as above

Therefore, the total programming time becomes longer

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