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System and method to determine peak power demand in an integrated circuit

A power, circuit technology, applied in the field of systems and methods for determining peak power requirements in integrated circuits, capable of solving problems such as integrated circuit performance and speed degradation, AC current bottlenecks, etc.

Inactive Publication Date: 2007-11-14
QUALCOMM INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

AC current bottlenecks occur when the impedance of the power distribution network is too high to achieve sufficient current to meet local device current demands
IC performance and speed can be drastically degraded due to AC current bottleneck

Method used

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  • System and method to determine peak power demand in an integrated circuit
  • System and method to determine peak power demand in an integrated circuit
  • System and method to determine peak power demand in an integrated circuit

Examples

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Embodiment Construction

[0014] The systems and methods described herein can be used to identify AC current bottlenecks in power distribution networks of integrated circuits. Once detected, design changes can be made, such as reducing the impedance of the power distribution network and increasing the effective capacitance of the power distribution network, to improve the overall power distribution network design. Make a worst-case estimate of the peak power demand of the circuit or the effective capacitance, effective resistance, and load of the power distribution network in order to identify AC current bottlenecks.

[0015] FIG. 1 is a simplified block diagram of an embodiment of a system 10 for determining peak power requirements in an integrated circuit. The system 10 is operable to receive one or more files 12 containing descriptions of circuit designs, such as logic design, physical layout, static timing analysis, packaging and decoupling, in a known data format or in a format to be developed. c...

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Abstract

A method comprises receiving a description of a power distribution network of a circuit, defining at least one DC supernode in the power distribution network, receiving a logical description of the circuit, and determining at least one logic path in the circuit. The method further comprises traversing the at least one logic path in reverse and determining at least one input vector of the at least one logic path. The input vector describes a plurality of nodes in the logic path and a logic transition at an output node occurring in response to a combination of logic transitions at at least one input node in the at least one logic path. The method further comprises assigning a weighting value to each logic transition of each node in the at least one input vector, identifying at least one input vector with maximum contribution to drawing power from the power distribution network as indicated by the assigned weighting, and simulating an AC response of the identified at least one input vector with maximum contribution and identifying at least one logic path generating a peak load to the power distribution network.

Description

[0001] This patent application claims priority to Provisional Patent Application Serial No. 60 / 634,960, filed December 9, 2004. technical field [0002] The present invention relates to systems and methods that can be used to identify AC current bottlenecks in power distribution networks of integrated circuits and determine peak power requirements in integrated circuits. Background technique [0003] In an integrated circuit, a power distribution network delivers current to all components in the circuit. The power distribution network can span multiple metal layers in an integrated circuit and can be arranged in a three-dimensional grid pattern. With the increasing device density and faster switching frequency of today's integrated circuits (especially microprocessors), it is extremely important to validate the power distribution network design. Today's high-performance microprocessors, such as digital signal processors, place greater demands on power supplies and impose ti...

Claims

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Application Information

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IPC IPC(8): G06F17/50
Inventor 托马斯·R·汤姆斯
Owner QUALCOMM INC
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