Method and apparatus for competing for host computer position in parallel system
An inverter and the technology of the inverter are applied in the field of power supply to achieve the effects of solving poor stability, avoiding system collapse and high real-time performance.
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[0055] like Figure 4 As shown, the inverter in this embodiment includes a first reporting unit 40, which is used to send a master ID (high level) and a slave ID (low level) to the host bus; a second reporting unit 42 , used to send communication information such as the capacity of the motor, the inverter power-on state, and the inverter power supply state to the communication bus; the listening unit 41 is used to listen to the level state of the host bus, that is, to listen to the parallel system Whether there is currently an inverter master in the system; the competition unit 43 is used to control the first reporting unit 40 to send the master identity to the master bus and use the inverter as the master ; Wherein, the competition unit 43 further includes a master release module 430, which is used to release the master flag of itself when the inverter in the master status loses the master status, and controls the first reporting unit 40 to send to the master bus Slave ID; t...
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