Image display device, method, program, recording medium of recording program and electronic device
An image display device, image technology, applied in the direction of static indicators, nonlinear optics, instruments, etc.
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Embodiment 1
[0035] Next, Embodiment 1 embodying the present invention will be described with reference to the drawings.
[0036] (whole structure)
[0037] figure 1 It is a diagram showing the hardware configuration of the image display device of the first embodiment. Such as figure 1 As shown, the image display device 1 has an input interface (hereinafter referred to as "input I / F") 10, a CPU 11, a ROM 12, a RAM 13, a hard disk (hereinafter referred to as "HD") 14, an image processing engine 15, a CD- ROM drive 16 , display interface (hereinafter referred to as “display I / F”) 17 , and power supply I / F 18 . These structures are interconnected via a bus 10 . In addition, the display screen 30 is connected to the display I / F 17 , and the power supply device 31 is connected to the power supply I / F 18 . Specific examples of the image display device 1 include a notebook computer, a projector, a television, a mobile phone, and the like that can display images on the display screen 30 . ...
Embodiment 2
[0163] Next, Embodiment 2 of the present invention will be described. In the first embodiment described above, a plurality of filtering processes are performed by a plurality of circuits (processing units), but in the second embodiment, a plurality of filtering processes are performed using one circuit. Specifically, in Embodiment 2, by switching the input and output signals of the filter operation circuit and the filter coefficients used by the filter operation circuit, one filter operation circuit performs the filter processing on the backlight brightness K and the image correction amount Gy filtering processing. That is, a circuit that performs filter processing on the backlight luminance K and a circuit that performs filter processing on the image correction amount Gy are also used, and filter processing is performed sequentially.
[0164] Figure 9 It is a block diagram showing a schematic configuration of a filter processing unit according to the second embodiment. Th...
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