Method, system for transmitting PCIE data and plate card thereof

Abstract

The invention discloses a method for transmitting PCIE data, which comprises storing CPU message into a message cache device of a source line chuck plate by the source line chuck plate CPU through an address isolation device of the source line chuck plate, obtaining an idle address of an objective line chuck plate message cache device from the objective line chuck plate message cache device by the address isolation device of the source line chuck plate, storing the message into the objective line chuck plate message cache device by the address isolation device of the source line chuck plate, abstracting the message by the objective line chuck plate message cache device, sending the message to a CPU of the objective line chuck plate. The invention discloses a system and an integrated circuit board device for transmitting the PCIE data. The invention effectively increases equipment retransmission performance on the basis of a PCIE switching network.

Description

technical field [0001] The invention relates to the technical field of communication, in particular to a PCIE (PCI Express, PCI express bus) data transmission method, system and board. Background technique [0002] PCI (Peripheral Component Interconnect) Express is a processor system bus initiated and developed by Intel. It is a serial interconnection technology. (PCI eXtended, the successor of PCI extension), the goal is to completely replace PCI and PCI-X. With the release of the PCI Express (referred to as PCIE) specification, more and more manufacturers have begun to introduce chips based on the PCIE specification. Some manufacturers have launched switches based on PCIE, which can connect many devices in one system. Advanced communication equipment (such as routers, switches, gateways, etc.) has also become an option. [0003] In the prior art, the architecture of a typical distributed system based on a PCIE switch, as shown in Figure 1, the PCIE switch provides multip...

AI Technical Summary

Problems solved by technology

[0012] 1. The communication protocol in the PCIE switching network is complex, which seriously affects the transmission performance between line cards: the sender needs to obtain the address of the receiver, and the address of the receiver needs to be updated to the sender

This increases the communication overhead, for example: when the receiver's address is updated to the sender, for some locked memory addresses, the receiver needs to send additional access lock overhead; and the transmission of a data packet is accompanied by PCIEMemory write The overhead of the two small packets (request address packet and get address packet) of the method, etc.

[0013] 2. The number of VC (Virtual Channel, virtual channel) in the PCIE switching network is not enough, which may easily cause HOL (Head of Line Blocking, letter head blocking) problem

If the inter-board transmission fails when performing these operations, the CPU will continue to wait, which will affect the basic operation of the CPU and cause a large transmission delay

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