Stack package and method of manufacturing the same
A semiconductor and chip technology, applied in the field of stacked packaging and its manufacturing, can solve problems such as cracks, complicated processes, and reduced production
Inactive Publication Date: 2008-08-27
SAMSUNG ELECTRONICS CO LTD
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Problems solved by technology
Also, when the semiconductor chip 90 is diced along the scribe line 80, a crack may be generated at the position of the redistribution pattern 35 or the metal through-electrode 30.
This leads to several problems as follows: the yield may be lowered, the wafer or semiconductor chip 90 may be damaged during drilling for the formation of the through via 95, a process for removing impurities associated with the formation of the through via 95 is required, and the impurity May cause current leakage, and the whole process will become more complicated
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[0019] The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. However, the present invention may be embodied in different forms and should not be limited to the embodiments set forth herein.
[0020] FIG. 3 is a cross-sectional view showing the structure of a stack package 200 according to some embodiments of the present invention. Referring to this figure, a stack package 200 includes a semiconductor chip 110 and an interposer 100 . Each semiconductor chip 110 is inserted into a corresponding one of the interposers 100 . In the stack package 200, the semiconductor chip 110 and the interposer 100 are stacked in a vertical layout. Bonding pads 130 are formed on each semiconductor chip 110, and the bonding pads 130 are exposed so as to be connected to leads (not shown) or redistribution patterns 150 for the purpose of supplying signals or power, and formed There...
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A stack package and a method of manufacturing the same are provided. The stack package includes one or more interposers in which a semiconductor chip having a bonding pad are inserted, an interconnection terminal groove is formed due to a difference of the areas between the semiconductor chip and a cavity into which the semiconductor chip is inserted, and an interconnection terminal connected to the bonding pad is formed in the interconnection terminal groove. In the stack package, the interposers are stacked with one another and the interconnection terminals are connected to one another such that one or more semiconductor chips are stacked and electrically connected.
Description
[0001] Cross References to Related Applications [0002] This application claims priority to Korean Patent Application No. 10-2007-0007253 filed in the Korean Intellectual Property Office on Jan. 23, 2007, based on 35 USC §119, the entire contents of which are hereby incorporated by reference. technical field [0003] The present invention relates to a stack package and a manufacturing method thereof, and more particularly, to a stack package capable of improving electrical connection characteristics between semiconductor chips stacked on each other and improving package yield, and a manufacturing method of the stack package. Background technique [0004] In recent years, consumer demand has gradually shifted to small, light, high-speed and high-capacity electronic products. To meet the demand for small electronic products, semiconductor chip packages have become smaller and lighter. In order to meet the above needs, the research direction has gradually shifted to packaging...
Claims
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IPC IPC(8): H01L25/00H01L25/065H01L23/48
CPCH01L2224/13144H01L2924/01047H01L2924/30105H01L2924/15311H01L2924/014H01L23/13H01L2221/68377H01L2924/01029H01L24/82H01L2924/18162H01L2924/01013H01L2924/01005H01L2924/01028H01L2924/01033H01L2924/01075H01L2924/01082H01L24/24H01L2924/01079H01L2924/18165H01L2224/18H01L2924/01006H01L2924/01078H01L2224/13147H01L24/19H01L2924/15156H01L2224/05569H01L2224/05008H01L2224/05026H01L2224/05548H01L2224/05001H01L2224/05124H01L2224/05147H01L2224/05166H01L2924/00014H01L2924/3512H01L2224/04105H01L24/05H01L2224/02372H01L2224/05599H01L23/12
Inventor 郑显秀张东铉郑泰敬金南锡柳承官
Owner SAMSUNG ELECTRONICS CO LTD