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MPC555 on-line artificial debugging minimum system

A minimal, jumper technology, applied in the field of off-chip expansion SRAM, to achieve ideal selection effect, reduce cost and reduce pressure

Inactive Publication Date: 2008-09-17
SHANGHAI FUEL CELL VEHICLE POWERTRAIN +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The present invention is to solve the technical problem around how to reduce the erasing and writing times of FLASH in the MPC555 during debugging to reduce the loss of FLASH

Method used

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  • MPC555 on-line artificial debugging minimum system
  • MPC555 on-line artificial debugging minimum system
  • MPC555 on-line artificial debugging minimum system

Examples

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Embodiment Construction

[0010] Take the online simulation debugging minimum system of MPC555 as an example for further explanation.

[0011] Depend on figure 1 As shown, U1 is MPC555 microcontroller, U2 is 4M (128K*32bit), the model is CY7C1347B off-chip extended SRAM, JP1 is the jumper for selecting off-chip SRAM, when CS1 and CE-RAM are short-circuited, select the The debugging program in the off-chip SRAM realizes the fast boot of the user program in the RAM through the double mapping method; it greatly reduces the pressure on the erasing times of the FLASH on the MPC555 chip. SRAM is erased when power is off, and has a long service life. It is an ideal choice for program debugging, which does not affect the efficiency of debugging and reduces the cost of research and development.

[0012] The following briefly introduces the mechanism of fast booting from RAM in MPC555: In the later stage of product development, it is usually necessary to burn the program into ROM with an emulator, but the runni...

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Abstract

The invention discloses a MPC555 on-line emulating debugging minimum system, characterized in that the invention comprises the MPC555, an off-chip expansion SRAM, and a jumper, through the dual mapping method of transferring and selecting the off-chip SRAM by the jumper and rapidly conducting to run from the RAM or the copy method of rapidly conducting to run from the RAM, a program is copied into the off-chip expansion SRAM from an inside FLASH to realize the running and debugging of an user program in an outside SRAM when power on. Because the Freescale MPC555 singlechip of 32 bits is adopted, the erasing time of the in-chip FLASH is only 100, which brings much limitation for the program operating, but the expansion CYPRESS 128Kx36 RAM with synchronism and buffering can make the debugging task run in the off-chip SRAM to relieve the press of the erasing time of the FLASH. The SRAM is erased if power fails, the lifetime is prolonged, the selecting effect of the program's debugging is very ideal, so the debugging efficiency is not influenced, and the cost of the research and development is reduced.

Description

technical field [0001] The invention relates to a minimum system with off-chip extended SRAM, which can be used for online simulation debugging in the off-chip SRAM, and belongs to the technical field of simulation debugging. Background technique [0002] In the automobile manufacturing industry, the controller such as the fuel cell vehicle controller, in the process of being put into application, the program often needs to go through a lot of simulation, debugging and modification, so as to finally reach our expected working state. MPC555 is a 32-bit microcontroller launched by Freescle. It has powerful functions and is often used in the field of automotive electronic control. MPC555 integrates 26KB of RAM and 448KB of FLASH. Since the size of the application program is generally above several hundred KB, the application program cannot be debugged in the MPC555 on-chip RAM, and all programs are burned into the FLASH for debugging. However, due to manufacturing process and ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/36
Inventor 万钢张戟孙泽昌钟再敏
Owner SHANGHAI FUEL CELL VEHICLE POWERTRAIN
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