Protruding block structure on base board

A technology of bumps and substrates, which is applied in the direction of electrical components, electrical solid devices, circuits, etc., and can solve problems such as the inability to detect the size of the gap between the glass and the wafer

Inactive Publication Date: 2008-09-17
台湾薄膜电晶体液晶显示器产业协会 +6
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this method cannot detect the size of the gap between the glass and the wafer

Method used

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  • Protruding block structure on base board
  • Protruding block structure on base board
  • Protruding block structure on base board

Examples

Experimental program
Comparison scheme
Effect test

no. 1 example

[0053] Figure 1A to Figure 1C is a schematic cross-sectional view of a bump structure on a substrate and its bonding process according to an embodiment of the present invention. Please refer to Figure 1A, the bump structure of this embodiment is configured on the substrate 100, which includes at least one electrode 102, a first bump 106, and second bumps 108a, 108b, 108c. In a preferred embodiment, the electrode 102 is formed on the substrate 100 , and a protective layer 104 is further formed on the surface of the substrate 100 , and the protective layer 104 exposes the electrode 102 . The substrate 100 is, for example, a silicon substrate, a glass substrate, a printed circuit board, a flexible substrate or a ceramic substrate. The material of the electrode 102 is metal, for example. In addition, the first bumps 106 are located on the electrodes 102 , and the second bumps 108 a , 108 b , 108 c are located on the substrate 100 , that is, the second bumps 108 a , 108 b , 108...

no. 2 example

[0066] Figure 8A to Figure 8C is a schematic cross-sectional view of a bump structure on a substrate and its bonding process according to an embodiment of the present invention. Please refer to Figure 8A , the bump structure of this embodiment is configured on the substrate 100 , which includes at least one electrode 102 and at least one stepped bump 306 . In a preferred embodiment, the electrode 102 is formed on the substrate 100 , and a protective layer 104 is further formed on the surface of the substrate 100 , and the protective layer 104 exposes the electrode 102 . In this embodiment, the stepped bump 306 is located on the electrode 102 . Similarly, the stepped bump 306 may be a metal bump, a conductive bump, or an elastic bump composed of a polymer bump and a conductive layer on the polymer bump. In addition, the transverse section of the stepped bump 306 is circular, elliptical, rectangular or polygonal. The stepped bump 306 is disposed on the electrode 102 or par...

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Abstract

The invention provides a bump structure on a substrate, comprising at least a first electrode, at least a first bump and at least a second bump. The first electrode is disposed on the substrate. The first bump is disposed on the first electrode. The second bump is disposed on the substrate, wherein the height of the second bump is higher than the height of the first bump. The elastic bump according to the invention can be used for testing quality of jointing technology.

Description

technical field [0001] The invention relates to a bump structure on a substrate, and in particular to a bump structure used to detect the quality of a bonding process. Background technique [0002] Generally, in a chip on glass (COG) process, the size of the gap between the glass and the wafer often depends on factors such as process pressure, adhesive material properties, and stress release. When determining the above process parameters, the selection of the gap between the wafer and the glass is extremely important. At present, the size of the gap between the glass and the wafer is judged by using a scanning electron microscope (SEM) for slice analysis after the bonding process. However, this method of analysis is very time-consuming. [0003] In addition, in the wafer-glass bonding process using anisotropic conductive film (ACF), the method of testing the bonding quality is to judge whether the bonding is good or not by using the bonding state of the conductive particle...

Claims

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Application Information

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IPC IPC(8): H01L23/485H01L23/544
CPCH01L2224/11
Inventor 陈酩尧杨省枢张世明曾毅
Owner 台湾薄膜电晶体液晶显示器产业协会
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