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Semiconductor encapsulation construction

A technology of semiconductor and structure, which is applied in the field of semiconductor packaging and structure to achieve the effect of reducing pressure

Active Publication Date: 2008-10-01
ADVANCED SEMICON ENG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] However, the thermoelectric cooler 130 is covered by the passive heat sink 150 , so the heat of the second surface 134 of the thermoelectric cooler 130 cannot be directly discharged from the semiconductor package structure 100 , but indirectly through the passive heat sink 150 . out of the semiconductor package structure 100
Furthermore, the weight of the passive heat sink 150 is pressed on the chip 120, which will cause the pressure of the chip 120

Method used

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  • Semiconductor encapsulation construction
  • Semiconductor encapsulation construction
  • Semiconductor encapsulation construction

Examples

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Embodiment Construction

[0051] refer to Figure 3a and Figure 3b , which shows the semiconductor package structure 200 of the first embodiment of the present invention. The semiconductor package structure 200 includes a carrier 240 , a chip 230 , a stiffener 220 , a heat sink 212 and an active heat sink 250 . The active surface 232 of the chip 230 is disposed on the upper surface 226 of the carrier 240 such as a substrate or a circuit substrate. A conductive element, such as a plurality of bumps 236 is located on the active surface 232 . The carrier 240 has a plurality of circuits (not shown in the figure) to be electrically connected to the active surface 232 of the chip 230 through the bumps 236 . A plurality of solder balls 222 are disposed on the lower surface 224 of the substrate 240 .

[0052] The reinforcing member 220 is disposed on the carrier 240 . In this embodiment, the reinforcing member 220 can be adhered to the carrier 240 by a first glue 242 . The stiffener 220 surrounds the ch...

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Abstract

The invention discloses a semiconductor package structure, comprising a load carrier, a chip, a reinforcing member, a thermal fin and an active radiator. The chip and the reinforcing member are arranged on the load carrier. The thermal fin is arranged on the reinforcing member and comprises a perforated opening. The active radiator is arranged on the chip and located in the perforated opening. The semiconductor package structure of the invention can simultaneously comprises the active radiator and the passive radiator with the active radiator being not covered by the passive radiator, for directly discharging the heat quantity of the chip out from the semiconductor package structure via the active radiator in order to realize rapid heat dispersion.

Description

technical field [0001] The present invention relates to a package structure, more particularly to a semiconductor package structure, the passive heat sink does not cover the active heat sink, and is used to discharge the heat of the chip directly outside the semiconductor package structure through the active heat sink , and the weight of the passive heat sink will not press on the chip, which will reduce the pressure on the chip. Background technique [0002] With the growing demand for lighter and more complex electronic devices, the speed and complexity of chips are relatively higher. A semiconductor chip needs to provide relatively more pins for inputting and outputting signals. The Ball Grid Array Package (BGA) is a package structure that has been widely used and has a high pin count. Furthermore, as the density of components on a semiconductor chip increases, more heat is generated, so effectively dissipating the heat generated by the semiconductor chip is another imp...

Claims

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Application Information

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IPC IPC(8): H01L23/34H01L23/367H01L23/38
CPCH01L2224/32225H01L2224/16225H01L2224/73253H01L2924/0002H01L2924/15311H01L2224/73204
Inventor 黄东鸿李长祺
Owner ADVANCED SEMICON ENG INC
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