Phase change memory cell storage of high reading speed, low operating interference and operating method thereof
A storage unit, reading speed technology, applied in the field of microelectronics
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[0022] The invention is described more fully hereinafter in reference to the examples illustrated in the illustrations, providing preferred embodiments but should not be considered limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the relevant art.
[0023] Where the referenced figures are schematic illustrations of idealized embodiments of the invention, the illustrated embodiments of the invention should not be construed as limited to the specific shapes of the regions shown in the figures.
[0024] The invention relates to a resistance storage device with high reading speed, high density and low operation interference and a corresponding storage operation method.
[0025] Figure 1(a) and Figure 1(b) are explained in the technical background of the invention.
[0026] image 3 The 2B2R memory cell structure proposed by...
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Abstract
Description
Claims
Application Information
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