Line board and technique

Abstract

The invention discloses a circuit board process, which includes the following steps: firstly, a substrate with a core layer and two first composite metal layers is provided, and the core layer is arranged between the first composite metal layers, and each first composite metal layer is provided with a first metal layer and a first etching barrier layer, and the first metal layer is arranged between the core layer and the first etching barrier layer; secondly, a conductive hole is formed on the substrate; thirdly, pattern conductive layers are formed on the first etching barrier layer and the inner wall of the conductive hole; then the first etching barrier layer which is the part exposed by the pattern conductive layer is removed to form a pattern first etching barrier layer; finally, thefirst metal layer which is exposed after the pattern conductive layer is removed is removed to form a pattern first metal layer. In addition, the process also discloses a circuit board.

Description

technical field [0001] The invention relates to a circuit board (Circuit Board) and its technology, and in particular to a circuit board with thin lines and its technology. Background technique [0002] In recent years, with the rapid development of the production technology of the electronics industry, circuit boards can be equipped with various electronic components with exquisite volumes, so as to be widely used in various electronic products with different functions. The manufacturing process of the known circuit board will be described below. Please refer to Figure 1A to Figure 1F , Figure 1A to Figure 1F It is shown as a cross-sectional flow diagram of a known circuit board process. Known circuit board technology comprises the following steps: at first, as Figure 1A As shown, a substrate 110 is provided. Wherein, the substrate 110 has a core layer 112 and two copper foil layers 114 , and the core layer 112 is arranged between the two copper foil layers 114 . The...

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Problems solved by technology

Wherein, since the copper foil layer 114 and the material such as the conductive layer 130 of copper have large variability in their thickness during the formation process, and the known technology cannot stably control the etching variability (the etching solution has a large impact on the copper foil layer 114 and the conductive layer 130). layer 130), so the line width W1 of the patterned line layer 150 produced by the known technology cannot meet the specifications of the thin line (the etchant will over-etch the copper foil layer 114 and the conductive layer 130 and cause the line width W1 to be insufficient. Conforms to thin line specifications)

In other words, known circuit board processes cannot produce circuit boards with thin lines

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