Multi-core processor oriented real-time thread migration method

A technology of multi-core processors and processor cores, applied in multi-programming devices, program startup/switching, etc., can solve problems such as difficulty in achieving load balancing, and achieve the effect of improving performance and shortening time

Inactive Publication Date: 2009-08-12
ZHEJIANG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Difficult to achieve load balancing by statically distributing load through prior task placement

Method used

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  • Multi-core processor oriented real-time thread migration method
  • Multi-core processor oriented real-time thread migration method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0024] 1) Thread migration between processor cores, all processor cores have private first-level cache, shared second-level cache and memory:

[0025] In most current multi-core processor architectures, processor cores have a private L1 cache and share L2 cache and memory. All processor cores share memory, so there is no need to transfer code and data in shared memory during thread migration. All processor cores share the second-level cache. When threads migrate, the data in the first-level cache of the source processor core only needs to be written back to the second-level cache instead of being written back to the memory.

[0026] 2) Thread migration initialization supported by hardware:

[0027] Most modern processors contain a series of debug registers. The PowerPC405 processor includes four 32-bit instruction address comparison registers. A hardware interrupt is generated when the value in the program count register equals the value in the address compare register of a...

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PUM

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Abstract

The invention discloses a real-time thread migration method oriented to multi-core processors. The method makes full use of the characteristics of a multi-core hardware system with shared second-level cache and memory so as to effectively achieve real-time thread migration on the multi-core processors. The method has the advantages of realizing thread migration initialization with hardware support and thread migration among processor cores, not needing to spend any time in polling system variables in thread runtime, reducing data transmission among the processor cores during thread migration, obviously improving the performance of thread execution and shortening the time of thread migration. The method can be used for various multi-core processors.

Description

technical field [0001] The invention relates to a thread migration method between processor cores on a multi-core hardware architecture. Background technique [0002] Due to the increase of processor clock frequency, the continuous rise of processor power consumption and temperature has led to the limit of processor manufacturers' competition in speed. Faced with the limit of this growth, microprocessor manufacturers have turned to the embrace of multi-core processor technology. Multi-core processor technology has opened up a new prospect for processor performance improvement. Some companies claim that the processors they produce will use multi-core architecture in an all-round way. [0003] Multi-core processor chips provide better concurrency and better system performance per watt than single-core processor chips. Concurrency provides higher performance scaling for control systems, network routing, and other devices. If these systems take full advantage of the concurre...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/48
Inventor 施青松陈度马建良吴斌斌王超曹满冯德贵王勇刚胡威陈天洲
Owner ZHEJIANG UNIV
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