Electrostatic discharge protecting device of high-voltage cushion

An electrostatic discharge protection and electrostatic discharge technology, which is applied in the field of ESD protection devices, can solve the problems that the power supply voltage cannot have PMOS components, and the ESD protection capability of high-voltage I/O pads is difficult to improve.

Active Publication Date: 2009-09-16
ELAN MICROELECTRONICS CORPORATION
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, since the high-voltage I/O pad must have the ability to withstand higher than the power supply voltage, the design cannot hav

Method used

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  • Electrostatic discharge protecting device of high-voltage cushion
  • Electrostatic discharge protecting device of high-voltage cushion
  • Electrostatic discharge protecting device of high-voltage cushion

Examples

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Embodiment Construction

[0041] figure 1 It is the first embodiment of the present invention. In the ESD protection device 100, the high-voltage NMOS transistor 106 is connected between the high-voltage pad 102 and the ground terminal GND. The high-voltage NMOS transistor 106 has a parasitic NPN BJT element 108, an inverting flip-flop The output of 112 is connected to the base of the BJT element 108, and the inverting flip-flop 112 turns on the BJT element 108 when the voltage VPP on the high voltage pad 102 is higher than a critical value so that the energy of the ESD on the high voltage pad is released to the ground terminal GND, thereby achieving ESD protection. Inverting flip-flop 112 includes PMOS transistor 114 connected between high voltage pad 102 and node 118, NMOS transistor 116 connected between node 118 and ground terminal GND, node 118 connected to the base of BJT element 108, resistor R1 connected to high voltage pad Between the node 102 and the node 120, the capacitor C1 is connected b...

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Abstract

The invention provides an electrostatic discharge protecting device of a high-voltage cushion, which comprises a high-voltage NMOS transistor that is connected between the high-voltage cushion and a low-voltage end and is provided with a parasitic element between source-drain electrodes thereof, and when voltage of a trigger on the high-voltage cushion reaches a critical value, the parasitic element is conducted so as to release the energy which is generated by the electrostatic discharge of the high-voltage cushion to the low-voltage end.

Description

technical field [0001] The present invention relates to an electrostatic discharge (ElectroStatic Discharge; ESD) protection device for a high-voltage pad, in particular to an ESD protection device that has good ESD protection capability and allows the high-voltage pad to have an open-drain output capability . Background technique [0002] Electrostatic discharge is the main factor causing most electronic components or electronic systems to be damaged by electrical overstress (Electrical Overstress, EOS). This damage will affect the circuit function of the integrated circuit, and make the integrated circuit work abnormally. In order to avoid the impact of ESD on the integrated circuit, an ESD protection device is provided on the input / output pad (I / O pad) of the integrated circuit to prevent the ESD from destroying the integrated circuit. However, since the high-voltage I / O pad must have the ability to withstand higher than the power supply voltage, the design cannot have ...

Claims

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Application Information

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IPC IPC(8): H01L23/60H02H9/00
Inventor 谢武聪周明俊柯明道
Owner ELAN MICROELECTRONICS CORPORATION
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