Method and device for logic analysis of high-speed serial bus
A high-speed serial bus and logic analysis technology, applied in the field of data communication, can solve problems such as signal distortion, large size, and complex design
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[0034] The invention provides a high-speed serial bus logic analysis method, image 3 A schematic diagram of Embodiment 1 of a high-speed serial bus logic analysis method of the present invention is provided, and the method includes the following steps:
[0035] Step S1, receiving a bus signal of a high-speed serial bus;
[0036] Step S2, copying the bus signal into a first signal and a second signal through a signal splitting module;
[0037] For example, the bus signal can be copied into the first signal and the second signal by a high-speed clock driver, which is a method for increasing the current, voltage and output capability of the clock signal, or enhancing one clock signal into multiple outputs s installation.
[0038]The inventor found in the process of implementing the present invention that the high-speed clock driver can divide any high-speed serial bus signal that has been processed by DC equalization. DC balanced signal, that is, the code in each 10bit code t...
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