Interleaving and rate matching and de-interleaving and rate de-matching methods

Abstract

The invention discloses an interleaving and rate matching method. A correction interleaving mode is determined according to a column interleaving mode and head filling bits, an interleaving operator is determined according to the correction interleaving mode, and the interleaving operator is utilized to perform interleaving processing on subblock interleaving matrices in sequence; one mode can utilize the interleaving operator to perform the interleaving processing on bits required to be output in the subblock interleaving matrices according to the requirement of redundancy version, directly output subblock interleaving results after protocol sorting while completing the interleaving of subblocks until meeting the corresponding requirement of the code rate; and the other mode can utilize the interleaving operator to perform the interleaving processing on the subblock interleaving matrices one by one, output the subblock interleaving results after protocol sorting to a circulating buffer while completing the interleaving of subblocks, and then output corresponding bits after the interleaving according to the requirement of the redundancy version. Furthermore, the invention also discloses a de-interleaving and rate de-matching method corresponding to the interleaving and rate matching method. The methods can greatly reduce buffers to be used and read-write operation of the buffers in the interleaving and rate matching and de-interleaving and rate de-matching processes.

Description

technical field [0001] The present invention relates to a rate matching technology, in particular to an interleaving rate matching and deinterleaving de-rate matching method. Background technique [0002] In a communication system, the function of rate matching is to adjust the code rate output by the channel encoder so that the number of bits output by the rate matching module matches the number of bits that can be carried by the physical resources allocated by the system. In the process of rate matching, it is generally combined with interleaving processing in order to realize a variable rate mechanism with superior performance and improve the stability of encoding performance at high code rates. [0003] Common interleaving methods can be divided into packet interleaving and convolutional interleaving. Packet interleaving, also known as matrix interleaving or block interleaving. In existing communication systems, such as 3GPP, 3GPP2 and other wireless communication tech...

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Problems solved by technology

[0008] From the above process, it can be found that figure 1 When the rate matching structure shown is implemented, there is the following problem: if the sub-block interleaver module, the bit collection module and the bit selection and pruning module are implemented as functional blocks, each module needs to temporarily store the intermediate results with a buffer , and then the next module takes the intermediate results from the buffer of the previous module for processing, which will introduce a large number of read and write operations on the buffer; although each sub-block can be processed in parallel when sub-block interleaving is performed, the same n sub-blocks The block interleaving process requires n identical hardware resources, and it is difficult to achieve resource sharing

if according to figure 1 The reverse process of the structure shown is implemented, and there are also disadvantages of many read and write operations on the buffer and difficult sharing of resources.

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