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Resistive memory, integrated circuit including resistive memory and manufacturing method

A resistive memory, integrated circuit technology, applied in static memory, digital memory information, circuits, etc., can solve the problems of complex manufacturing process, damage to the interface structure of the storage medium 170, affecting the performance of resistive memory, etc., to simplify the manufacturing process and process method. Flexible and controllable, good interface quality

Active Publication Date: 2011-11-30
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Moreover, the manufacturing process of the resistive memory is usually to form the lower electrode 160 in the medium layer, then oxidize the material of the lower electrode to form the storage medium 170, and then form a photomask on the storage medium 170, Expose and develop the photomask to expose the storage medium 170, deposit and form the upper electrode 180 on the storage medium, and finally remove the photomask. After the storage medium 170 is formed, the storage medium 170 is stored. Multiple times of semiconductor manufacturing processes on the medium 170 will cause unnecessary damage to the interface structure of the storage medium 170 and affect the performance of the resistive memory
[0005] Moreover, in the prior art, for an integrated circuit containing a resistive memory, the formation process of the resistive memory and the interconnection structure of other memories in the integrated circuit are separately carried out, so the manufacturing process is complicated.

Method used

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  • Resistive memory, integrated circuit including resistive memory and manufacturing method
  • Resistive memory, integrated circuit including resistive memory and manufacturing method
  • Resistive memory, integrated circuit including resistive memory and manufacturing method

Examples

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Embodiment 1

[0043] This embodiment provides a manufacturing method of an integrated circuit containing a resistive memory, refer to the attached Figure 12 shown, including:

[0044] Provide a semiconductor substrate and an interlayer dielectric layer on the semiconductor substrate, the semiconductor substrate and the interlayer dielectric layer include a core device area and a peripheral circuit area;

[0045]Openings are respectively formed in the interlayer dielectric layer of the core device area and the peripheral circuit area, and barrier layers and metal wiring are filled in the openings in order to form a first interconnection structure and a second interconnection structure. The first interconnection structure is used for The second interconnect structure is used to electrically connect the semiconductor devices in the core device area, and the second interconnection structure is used to electrically connect the semiconductor devices in the peripheral circuit area;

[0046] form...

Embodiment 2

[0091] This embodiment provides a resistance memory, refer to the attached Figure 11 As shown, it includes a first interconnection structure as a lower electrode, the first interconnection structure includes a metal wiring 206a and a barrier layer 206b located on the outer sidewall of the metal wiring, and a first dielectric layer on the metal wiring 206a as a storage medium layer layer 207, an etch barrier layer 220a on the barrier layer 206b, a first conductive layer 212a on the etch barrier layer 220a and the first dielectric layer 207, and a second conductive layer 209 on the first conductive layer 212a , the first conductive layer 212a and the second conductive layer 209 constitute the upper electrode of the resistive memory.

[0092] The blocking medium layer is silicon nitride or silicon oxide or a compound structure of silicon nitride and silicon oxide, and the thickness is 20nm-80nm.

[0093] Wherein, the first interconnection structure is located in the interlayer ...

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Abstract

A method for manufacturing an integrated circuit containing a resistive memory, comprising: providing an interlayer dielectric layer including a core device area and a peripheral circuit area; forming a first interconnection structure and a second Two interconnect structures; forming a blocking dielectric layer on the interlayer dielectric layer; etching the blocking dielectric layer to expose the metal wiring in the core device area; forming a first dielectric layer on the metal wiring; forming a covering blocking dielectric layer and the first dielectric The first conductive layer of the first layer; form a mask on the first conductive layer, etch the first conductive layer and the blocking dielectric layer until the second interconnection structure is exposed, and the first conductive layer and the first interconnection structure on the first interconnection structure remain A blocking dielectric layer; forming a second conductive layer and a third conductive layer on the first conductive layer and the second interconnection structure respectively. The method can realize the interlayer interconnection structure of the core device area and the peripheral circuit area while forming the resistance memory.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for manufacturing a resistance memory and an integrated circuit containing the resistance memory. Background technique [0002] At present, the development of new storage technologies with low cost, high speed, high storage density, simple manufacturing and good compatibility with the current complementary metal oxide (CMOS) semiconductor integrated circuit process has attracted widespread attention worldwide. Resistive random access memory (RRAM) memory technology based on metal oxides with resistive switching characteristics is currently the focus of development by many device manufacturers, because this technology can provide higher density, lower cost and lower power consumption. power non-volatile memory. The resistance value of the RRAM memory cell will change greatly after the pulse voltage is applied, and this resistance value can still be ma...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/822H01L21/768H01L27/24H01L23/522H01L45/00G11C11/56G11C13/00
Inventor 鲍震雷
Owner SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP
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