Dynamic reconfigurable device and method for carrying out dynamic reconfiguration thereby

Abstract

The invention discloses a dynamic reconfigurable device and a method for carrying out dynamic reconfiguration thereby. The device comprises a main processor, a memory and a partial reconfigurable unit, and is characterized by further comprising a recovery cache which contains a task memory unit, an output interface and an input monitoring interface. The input monitoring interface records the added tasks in the partial reconfigurable unit automatically, and the output interface inquires the tasks provided by the main processor in the task memory unit and outputs the matched task to the main processor. The input monitoring interface weeds out a task in virtue of the least recently used algorithm when the task memory unit is full, and weeds out the polluted task automatically when the newly-added tasks occupies a part of circuits of the existing tasks in the partial reconfigurable unit and causes the pollution to the subsequent tasks. The recovery cache is utilized to automatically monitor and record the tasks in the partial reconfigurable unit, and therefore, the computational ability of the dynamic reconfigurable system is improved.

Description

technical field [0001] The invention relates to a dynamic reconfigurable device, especially a fine-grained dynamic reconfigurable device. It also relates to a dynamically reconfigurable method using the dynamically reconfigurable device. Background technique [0002] Document 1 "US Patent No. US20070162529" discloses a dynamically reconfigurable circuit. The device is composed of multiple FPGAs, storage modules, interconnection modules and disk arrays. Among them, the storage module and disk array module are responsible for data storage, FPGA is responsible for circuit reconstruction and calculation tasks, and the interconnection module is responsible for the connection between modules. There is a control module, which provides power to the FPGA and controls the configuration of the FPGA, and the configuration information package includes configuration files of the FPGA, initialization information for connecting switch components, and scripts describing each FPGA feedback ...

AI Technical Summary

Problems solved by technology

However, the reconfiguration structure of this device is relatively simple, and it cannot effectively improve the circuit computing capability for large-scale circuit reconfiguration in special fields.

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