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Processor structure and instruction system representation method based on multi-dimensional variable description table

An instruction system, processor technology, applied in the direction of program control devices, etc.

Inactive Publication Date: 2010-02-10
THE PLA INFORMATION ENG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] 1. General format of machine instructions

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0188] The processor identification information table Tp includes a processor classification information table and a processor package type table.

[0189] The processor classification information table contains processor number (1), processor name (8086), processor type (mpu), processor manufacturer (Intel), processor serial number (8086), and number of processor bits (16) , package type (DIP);

[0190] The processor package type table contains processor number (1), package pin number (1), pin count (40), package name (none).

[0191] The processor structure information table Ts includes an instruction basic information table, a register information table, an interrupt structure table, a storage space configuration table, and a processor reset address table.

[0192] The instruction basic information table contains the number of instructions (163), the basic instruction word width (8), the minimum instruction length (8), the maximum instruction length (none), and t...

Embodiment 2

[0249] The processor identification information table Tp includes a processor classification information table and a processor package type table. Processor classification information table contains processor number (2), processor name (MC68000), processor type (mcu), processor manufacturer (Motorola), processor serial number (68030), processor bit number (32) , package type (FC);

[0250] The processor package type table contains processor number (2), package pin code (1), pin count (132), package name (FC).

[0251] The processor structure information table Ts includes an instruction basic information table, a register information table, an interrupt structure table, a storage space configuration table, and a processor reset address table.

[0252] The instruction basic information table contains the number of instructions (102), the basic instruction word width (16), the minimum instruction length (16), the maximum instruction length (80), and the maximum number of...

Embodiment 3

[0312] The processor identification information table Tp includes a processor classification information table and a processor package type table. The processor classification information table contains processor number (3), processor name (TMS320c5x), processor type (dsp), processor manufacturer (Texas Instruments), processor serial number (C52), processor bit number (16 ), package type (QFP);

[0313] The processor package type table contains processor number (3), package pin code (1), pin count (100), package name (QFP).

[0314] The processor structure information table Ts includes an instruction basic information table, a register information table, an interrupt structure table, a storage space configuration table, and a processor reset address table.

[0315] The instruction basic information table contains the number of instructions (133), the basic instruction word width (16), the minimum instruction length (16), the maximum instruction length (32), and the ma...

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PUM

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Abstract

The invention relates to the field of reverse analysis of computer softwares, in particular to a processor structure and an instruction system representation method based on a multi-dimensional variable description table. The method adopts a multi-layer triple nested table (Table) to construct a structural characteristic library and an instruction system description template of processors, the Table is represented as [<Tp1, Ts1, Ti1>, <Tp2, Ts2, Ti2>, ..., <Tpn, Tsn, Tin>], each triple <Tpn, Tsn, Tin> represents one processor, Tpn performs the classification, indexing and screening on the processors, Tsn provides register structure information, interruption structure information, reset address information and storage space distribution information, Tin provides a machine code, an assemblyexpression and the mapping relation between the machine code and the assembly expression, data in the Table is extracted from an information database of the processors, and the information database ofthe processors can be managed and maintained. The method has strong universality, and can be used for most of the prior processors.

Description

(1) Technical field: [0001] The invention relates to the field of computer software reverse analysis, in particular to a processor structure and instruction system representation method based on a multi-dimensional variable description table. (two), background technology: [0002] In the reverse analysis of computer software, for the restoration of the target code of a specific processor, the static description table can be used to effectively represent the corresponding relationship between the processor structure and instruction basic code and assembly instructions. However, due to the great differences in the structures and instruction systems of different processors, the static description table is not suitable for the unified representation of multi-processor multi-instruction systems. [0003] The structural characteristics of the current microprocessor are mainly described from the following three aspects: [0004] 1. The structural characteristics of the microproces...

Claims

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Application Information

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IPC IPC(8): G06F9/44
Inventor 蒋烈辉尹青何红旗刘铁铭费勤福谢耀滨吴金波陈亮张有为张媛媛
Owner THE PLA INFORMATION ENG UNIV
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