Method and device for generating and coding quasi-cyclic LDPC code
A quasi-cyclic, bit-rate technology, applied in the field of generating quasi-cyclic low-density parity-check codes and coding, can solve the problems of weakened performance, too many constraints, and no consideration of the influence of the check matrix girth, etc., to achieve weakening ring overlapping effect
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[0123] Such as Figure 17 As shown, the seventh embodiment of the present invention uses a quasi-cyclic low-density parity-check code encoding device 17, and the quasi-cyclic low-density parity-check code encoding device 17 includes:
[0124] Check matrix processing unit 171, it is used to carry out block processing to check matrix, the check matrix of M * N is divided into one ((M-1) * Z) * ( (N-M)×Z) sub-matrix A, a ((M-1)×Z)×Z all-zero matrix B, a ((M-1)×Z)×((M-1)×Z) Group lower triangular matrix T, a matrix C of Z×((N-M)×Z), a special sub-matrix P of Z×Z SC , E is a Z×((M-1)×Z) matrix E, where the special sub-array P SC Decompose into a 1×(Z-1) vector B with only the first element taking a non-zero value 1 , a (Z-1)×(Z-1) lower triangular matrix T 1 , a non-zero element D 1 , a (Z-1)×1 vector E 1 .
[0125] Calculation unit 172, which is used to calculate and complete the encoding of the information to be encoded. If the information sequence to be encoded is s, th...
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