Method and device for generating and coding quasi-cyclic LDPC code

A quasi-cyclic, bit-rate technology, applied in the field of generating quasi-cyclic low-density parity-check codes and coding, can solve the problems of weakened performance, too many constraints, and no consideration of the influence of the check matrix girth, etc., to achieve weakening ring overlapping effect

Active Publication Date: 2010-03-03
HONOR DEVICE CO LTD
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Problems solved by technology

[0005]Because there are too many constraints on the structure corresponding to the check bits in the existing linearly coded parity check matrix, the degree distribution of the final designed code deviates from the optimal degree distribution of
The existing asymptotic edge growth (PEG: ProgressiveEdgeGrowth) algorithm for constructing quasi-cyclic LDPC codes is considered from the perspective of a single element in each column of the basic matrix, and the non-zero element position of the basic matrix is ​​only set from the perspective of the basic matrix Considering that the influence of ring overlap in the basic matrix on the girth of the extended parity check matrix is ​​not considered, so this may weaken the performance of the code obtained by the final search

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no. 7 example 1

[0123] Such as Figure 17 As shown, the seventh embodiment of the present invention uses a quasi-cyclic low-density parity-check code encoding device 17, and the quasi-cyclic low-density parity-check code encoding device 17 includes:

[0124] Check matrix processing unit 171, it is used to carry out block processing to check matrix, the check matrix of M * N is divided into one ((M-1) * Z) * ​​( (N-M)×Z) sub-matrix A, a ((M-1)×Z)×Z all-zero matrix B, a ((M-1)×Z)×((M-1)×Z) Group lower triangular matrix T, a matrix C of Z×((N-M)×Z), a special sub-matrix P of Z×Z SC , E is a Z×((M-1)×Z) matrix E, where the special sub-array P SC Decompose into a 1×(Z-1) vector B with only the first element taking a non-zero value 1 , a (Z-1)×(Z-1) lower triangular matrix T 1 , a non-zero element D 1 , a (Z-1)×1 vector E 1 .

[0125] Calculation unit 172, which is used to calculate and complete the encoding of the information to be encoded. If the information sequence to be encoded is s, th...

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Abstract

The invention relates to the technical filed of the error correction and coding of communication and information systems and discloses a method for generating a quasi-cyclic low density parity check code. The method comprises the following steps: according to the requirements on code rate and code length of the low density parity check code to be designed and system requirements, determining a degree distribution sequence which is selected by adopting a density evolution method; setting the column weight of each column of a basic matrix according to the selected degree distribution sequence; setting the positions and values of non-zero elements in each column in the basic matrix according to the column weights of the basic matrix to obtain the basic matrix; and expanding the obtained basic matrix into a check matrix. At the same time, the invention also discloses a method for coding the quasi-cyclic low density parity check code and provides corresponding devices. The methods and the devices provided by the embodiment of the invention enable finally obtained code words to effectively reduce influences of cycle overlapping.

Description

technical field [0001] The invention relates to the technical field of error correction coding for communication and information systems, in particular to a method and device for generating quasi-cyclic low-density parity check codes and coding. Background technique [0002] Low-density parity check (LDPC, lowdensityparitycheck) code is a linear block code proposed by Gallager in 1962. Because of the small number of "1" in its check matrix, it is called low-density parity check code. , then re-proposed and improved by Mackay in 1996. In addition to expressing LDPC codes with parity check matrices, Tanner graphs can also be used (see figure 1 ) represents an LDPC code, and the Tanner graph corresponds directly to the check matrix, which consists of variable nodes, check nodes and edges connecting them. Each check node z i Corresponding to row i of check matrix, each variable node x j Corresponds to the jth column of the parity check matrix. When the jth bit in the codewo...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M13/11
CPCH03M13/116
Inventor 原进宏宁军刘玥王光健严茜曾雁星梁伟光
Owner HONOR DEVICE CO LTD
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