Memory controller and decoder

Abstract

The invention provides a memory controller and a decoder. The decoder is applicable to the memory controller. The decoder comprises a first transistor, a second transistor, a third transistor and a fourth transistor, and the grids of the first transistor, the second transistor, the third transistor and the fourth transistor are respectively coupled to a first control signal, a second control signal, a third control signal and a fourth control signal. The first end and the second end of the first transistor are respectively coupled to a first voltage and the first end of the second transistor, and the first ends and the second ends of the third transistor and the fourth transistor are respectively coupled to the second end of the second transistor and a second voltage. When the first transistor and the second transistor are cut off, the voltage of the second control signal is smaller than the voltage of the first control signal. Thus, the possibility of drain current from the grids of the transistors can be reduced.

Description

technical field [0001] The present invention relates to a memory controller and decoder, and more particularly to a circuit for reducing gate-induced-drain leakage. Background technique [0002] Memory is a kind of storage device, which has the advantages of fast access speed and small size. At present, memory has been widely used in various electronic devices. In the process of reading and writing data, the memory needs to be addressed by the decoder. A known address decoder (Decoder) will be described below. [0003] figure 1 is a circuit diagram of a known address decoder. The address decoder 10 is composed of transistors 11-13. The control signal bMWL can be used to control whether the transistors 11 and 12 are turned on or not. The control signal WLRST can be used to control whether the transistor 13 is turned on or not. In this way, the signal WL can be controlled. [0004] It should be noted that the gate-induced drain leakage (Gate-Induced Drain Leakage, GIDL...

AI Technical Summary

Problems solved by technology

GIDL current is likely to cause memory operation errors, which in turn affects the correctness of data access

Images