Semiconductor storage device and method of manufacturing same
A technology of a storage device and a manufacturing method, which is applied in the manufacturing of semiconductor/solid-state devices, semiconductor devices, electric solid-state devices, etc., can solve problems such as rising costs, and achieve the effect of halving address information and reducing costs.
Active Publication Date: 2014-12-03
RENESAS ELECTRONICS CORP
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Problems solved by technology
In this way, in order to separate the control gate electrodes 106a and 106b, when the resist 107 is formed by photolithography, the cost of the device increases.
Method used
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Embodiment 1
[0027] A semiconductor memory device according to Embodiment 1 of the present invention will be described with reference to the drawings. figure 1 It is a partial plan view schematically showing the structure of the semiconductor memory device according to Embodiment 1 of the present invention. figure 2 (A) schematically shows the structure of the semiconductor memory device according to Embodiment 1 of the present invention figure 1 Section view between X-X', (B) figure 1 The cross-sectional view between Y-Y'. image 3 is schematically showing the structure of the semiconductor memory device according to Embodiment 1 of the present invention figure 1 The cross-sectional view between Z-Z'. Figure 4 is an equivalent circuit diagram schematically showing the structure of the semiconductor memory device according to Embodiment 1 of the present invention.
[0028] refer to Figure 1 to Figure 4 , the semiconductor memory device is a semiconductor memory device having a ...
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A semiconductor storage device and method of manufacturing same at a lower cost by without forming a photolithographic resist. Second impurity regions are arranged in such a manner that second impurity regions adjacent along the column direction are joined together. A select gate electrode is arranged into a ring shape so as to surround the second impurity regions, and is electrically connected to a word line. A first control gate electrode is arranged into a ring shape on the outer peripheral side of the select gate electrode, and a second control gate electrode is arranged into a ring shape on the inner peripheral side of the select gate electrode. A pair of first and second bit lines corresponding to every row are placed on the memory cells of the device, a first bit line is electrically connected to one of first impurity regions that are adjacent along the row direction, and a second bit line is electrically connected to the other of the first impurity regions that are adjacent along the row direction.
Description
technical field [0001] The present invention relates to a semiconductor storage device having a split gate type nonvolatile memory and a method of manufacturing the same. Background technique [0002] Among semiconductor memory devices having a split-gate nonvolatile memory, some semiconductor memory devices have a memory cell having a structure in which a pair of impurity regions 102a and 102b are formed on the main surface of a substrate 101 with a channel region interposed therebetween. A select gate electrode 104 is formed on the channel region through a gate insulating film 103, and on both sides of the select gate electrode 104 and the channel region (between the impurity regions 102a, 102b and the select gate electrode 104 On the surface of the channel region between regions), sidewall-shaped control gate (Control gate) electrodes 106a, 106b (refer to Figure 7 , 9 , 10, for example, refer to patent documents 1, 2). In such a semiconductor memory device, after the s...
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IPC IPC(8): H01L27/115H01L29/78H01L29/423H01L21/8247
CPCH01L27/11568H01L29/66833H01L29/42344H01L29/792H01L27/11565H01L21/28282H01L29/40117H10B43/30H10B43/10
Inventor 竹下利章
Owner RENESAS ELECTRONICS CORP