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Method for controlling processing process of STI (Shallow Trench Isolation) channel of wafer

A technology for shallow trench isolation and wafers, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., and can solve problems that affect product quality stability, increase production costs, and reduce yields

Active Publication Date: 2010-12-01
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP
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Problems solved by technology

[0003] However, in actual production, the STI depth of wafers produced in the same batch often varies little, but the STI depth of the same wafer produced in different batches varies greatly, which will seriously affect the stability of product quality and reduce the quality of finished products. rate, increasing production costs

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  • Method for controlling processing process of STI (Shallow Trench Isolation) channel of wafer
  • Method for controlling processing process of STI (Shallow Trench Isolation) channel of wafer

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Embodiment Construction

[0009] The inventor found through repeated research and experiments that under the same conditions, the depth of the STI is proportional to the time of the etching process (called the main etching process) used to generate the STI structure. Therefore, the inventor proposes a method of adjusting the etching time through a feedback mechanism, so as to achieve the purpose of controlling the depth of the STI.

[0010] In order to make the purpose, technical solution and advantages of the present invention clearer, the present invention will be further elaborated below in conjunction with the accompanying drawings.

[0011] The embodiment of the present invention studies the relationship between the STI depth and the time of the main etching process under the same conditions. The x-axis represents the time of the main etching process in seconds, and the y-axis represents the STI depth in nanometers (nm). Formula (1) can be obtained by linear fitting:

[0012] y=42.07x+1844.8, (1...

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Abstract

The invention discloses a method for controlling the processing process of an STI (Shallow Trench Isolation) channel of a wafer. The method comprises the following steps of: preliminarily acquiring the linear relation between an STI channel depth and main etching time; measuring the obtained STI depth of a wafer passing through a main etching process to obtain offset between a practical STI depth and a target STI depth; and acquiring a main etching time adjusting value of the main etching time according to the offset and the preliminarily acquired linear relation and adjusting the main etching time according to the adjusting value. By using the method, the same kind of wafers produced at different batches can have changeable STI depths in an acceptable range.

Description

technical field [0001] The invention relates to the technical field of design and manufacture of semiconductor integrated circuits, in particular to a method for controlling the processing process of wafer shallow trench isolation grooves. Background technique [0002] In the manufacturing process of semiconductor integrated circuits, it is often necessary to form a shallow trench isolation (STI) structure on a wafer by etching. For the same type of wafer, the difference in STI depth will have a significant impact on the performance of the wafer. Therefore, in order to ensure the stability of product quality, it is necessary to strictly control the variation range of STI depth to make the mean square error as small as possible. [0003] However, in actual production, the STI depth of wafers produced in the same batch often varies little, but the STI depth of the same wafer produced in different batches varies greatly, which will seriously affect the stability of product qua...

Claims

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Application Information

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IPC IPC(8): H01L21/762H01L21/306H01L21/66
Inventor 赵林林
Owner SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP
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