Method for enhancing communication speed of on-chip multiprocessor

Abstract

The invention relates to a method for enhancing communication speed of an on-chip multiprocessor, belonging to the technical field of computers. The method comprises the following steps of grouping all processors according to the communication needs; establishing a binary tree connection topological relation for each group of processors; arranging a connecting channel on each pair of parent-childnode processors in each group of the processors, and arranging a register and a controller on each connecting channel; expanding a local storage read-write groove and a remote read-write groove on each processor to enable the width of the local storage read-write groove to be equal to the width of the connecting channel between the processor and a parent node thereof and enable the width of the remote read-write groove to be the same with the width of the connecting channel which is connected to the remote read-write groove; when a processor A launches communication to a target processor B, shifting to clock drive with a unified frequency to carry out communication between the processor A and the target processor B, and when finishing the communication, finishing shield on original bus clock drive. The invention realizes rapid communication among on-chip multiprocessing system processors, shortens the communication time and enhances the throughput of a whole system.

Description

technical field [0001] The invention relates to a method in the field of computer technology, in particular to a method for increasing the communication speed of multi-processors on a chip. Background technique [0002] The development of the processor is limited by many factors such as the limitation of the increase of the switching speed of the transistor, the shorter electron transmission distance caused by the high clock frequency, the inability to effectively reduce the leakage power consumption, and the inconspicuous heat dissipation effect. The development of the single processor has been stagnant for a long time. forward. More and more manufacturers choose to use multiple relatively simple processors to build multi-processor systems, in this way to improve the performance of the entire system. [0003] There are many classifications of multiprocessors. According to whether the processor is on the same wafer dicing piece, it can be divided into: (1) off-chip multipro...

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Problems solved by technology

[0008] After searching the existing literature, it is found that the QPI (Quick Path Interconnect-Quick Path Interconnect) technology proposed by Intel (Intel Corporation—Tell Corporation) (see Intel official document http: / / www.intel.com / technology / quickpath / http: / / www.intel.com / technology / quickpath / whitepaper.pdf) is to speed up the communication between processors, but this technology has the following disadvantages: (1) It is only applicable to the case where the number of processors is small , when the number of processors increases, establishing a fast channel between any two processors makes the complexity of the connection n^2 level, n is the number of processors, and the system complexity increases greatly; (2) and the transmission speed of this technology The ratio upper limit is 1, which cannot break through the bandwidth of a single channel

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