data control circuit

Abstract

The data control circuit includes input / output lines and drivers. The I / O line precharge circuit precharges the global I / O lines to a predetermined voltage when the read or write operation is not in operation. The driver includes a plurality of MOS transistors and drives the global input / output line during a read operation in response to receiving data from the local input / output line and the complementary local input / output line.

Description

technical field [0001] The present invention relates to semiconductor circuits, and more particularly, to data control circuits. Background technique [0002] As computing systems and electronic communications continue to advance, semiconductor memory products used to hold information have become cheaper, smaller in size, and larger in data capacity. Furthermore, the ever-increasing need for energy efficiency is now driving semiconductor memories to operate with greatly reduced current consumption than before. [0003] Meanwhile, a dynamic random access memory (DRAM) has various types of drives for performing read and write operations. For example, DRAM read operations may be performed using I / O line sense amplifier drivers that drive global I / O lines to accept data from local I / O lines. A write operation of the DRAM requires a data input driver for driving a global input / output line to receive input data from a DQ pad. [0004] Those drivers built into DRAM typically con...

AI Technical Summary

Problems solved by technology

[0005] However, leakage current can still flow through these MOS transistors of the driver turned off when no read or write operations are required, for example, when in a power-saving state

Therefore, larger sized MOS transistors required to achieve higher drivability under low supply voltage conditions may cause an increase in leakage current

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