Network sacrifice Cache for multi-core processor and data request method based on Cache

Abstract

The invention discloses a network sacrifice Cache for a multi-core processor and a data request method based on the Cache. The network sacrifice Cache is arranged in a network interface and comprises a sacrifice Cache used for storing a data block substituted from a L1 Cache and an active catalogue Cache used for storing and maintaining the catalogue information. Through the network sacrifice Cache for a multi-core processor and the data request method based on the Cache provided by the invention, the speed of L1 Cache deficiency access is increased and the property of the multi-core processor is improved.

Description

technical field [0001] The invention relates to the technical field of computer system structure, in particular to a network sacrificial high-speed cache memory (Cache) for a multi-core processor and a data request method based on the network sacrificial Cache. Background technique [0002] The demand for large data volumes in commercial and scientific computing applications makes the shared L2 Cache structure widely used in multi-core processors (CMP). The shared L2 Cache structure can maximize the use of on-chip Cache capacity and reduce access to off-chip memory , Commercial processors such as Piranha, Niagara, XLR, and Power 5 all use a shared L2 Cache structure. Due to physical layout and chip manufacturing considerations, future large-scale multi-core processors usually adopt a fragmented structure. Each slice contains a processor core, a private L1 Cache, an L2Cache Bank, and a router. These slices are connected to the On-chip network, in which physically distributed...

AI Technical Summary

Problems solved by technology

As the scale of the processor expands, the delay of L1 Cache miss access becomes larger and larger, while the ratio of L2 Cache access delay saved by Active Dir...

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