Methods for network throughput enhancement
A point-to-point, sub-range technology, applied in the data field, can solve problems such as low spectrum utilization
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example 1
[0123] assume n 1 =n 2 =n=5 and P clk =528MHz, C A = 1 / 528 μs, Y measures 342.595 μs and Y′ measures 65882.595 μs, then using equation (5), C D can be estimated to be 1.89405ns, and using equation (6), B D It can be estimated to be 2.5752μs. At the superframe period of D 414 (=pC D ), the clock count pC of A 411 D / C A ~34605028 cycles. However, the clock of D 414 still counts p = 65536 x 528 = 34603008 cycles. The virtual clock of A 411 can be obtained by subtracting one clock cycle from the physical clock cycle of A 411 every 17131 (=34605028 / (34605028-34603008)) physical clock cycles.
example 2
[0125] assume n 1 =n 2 =n=5 and P clk =66MHz, C A = 1 / 66 μs, Y measures 342.595 μs and Y′ measures 65882.595 μs, then using equation (5), C D can be estimated to be 15.152ns, and using equation (6), B D It can be estimated to be 2.584μs. At the superframe period of D 414 (=pC D ), the clock count pC of A 411 D / C A ~4325514 cycles. However, the clock of D 414 still counts p = 65536 x 66 = 4325376 cycles. The virtual clock of A 411 can be obtained by subtracting one clock cycle from the physical clock cycle of A 411 every 31344 (˜4325514 / (4325514−4325376)) physical clock cycles.
[0126] Figure 17 A flowchart of the synchronization method is given in .
[0127] exist Figure 17 where P is the number of physical clock cycles of a device during the superframe period of the slowest device, and Q (Q=65536×528) is the number of physical clock cycles of the slowest device during the same superframe period of the slowest device. First, in process 1701, a device joins a b...
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