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Multiple-bit per cell (MBC) non-volatile memory apparatus and system having polarity control and method of programming same

A multi-bit per cell, non-volatile technology, used in static memory, read-only memory, digital memory information, etc., to solve problems such as programming time, power consumption, and increasing number of programming states

Active Publication Date: 2011-06-15
CONVERSANT INTPROP MANAGEMENT INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0010] However, this method results in an increase in programming time, power consumption and the number of programming states that must be traversed compared to other known methods

Method used

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  • Multiple-bit per cell (MBC) non-volatile memory apparatus and system having polarity control and method of programming same
  • Multiple-bit per cell (MBC) non-volatile memory apparatus and system having polarity control and method of programming same
  • Multiple-bit per cell (MBC) non-volatile memory apparatus and system having polarity control and method of programming same

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Embodiment Construction

[0046] first reference figure 1 , shows a diagram of a non-volatile memory (NVM) device 100 according to the present invention. The memory device 100 is preferably a flash memory, but could also be any type of EEPROM (Electrically Erasable Programmable Read Only Memory). The memory device includes at least one memory array 102 including one or more memory blocks 104 . For purposes of this disclosure, a block is defined as an erasable portion of memory.

[0047] The memory device 100 also includes a controller 106 for controlling functions of the storage array, such as executing commands received at the interface 110, writing data received at the interface 110 to the storage array 102, reading data from the storage array 102 and providing data to interface 110, and erase data from block 104. The controller 106 includes a polarity control 112 function, which is described in detail below. It should be noted that polarity control 112 may be implemented in hardware, software, ...

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Abstract

The invention provides a Multiple-bit per Cell (MBC) non-volatile memory apparatus, method, and system wherein a controller for writing / reading data to / from a memory array controls polarity of data by selectively inverting data words to maximize a number of bits to be programmed within (M-1) virtual pages and selectively inverts data words to minimize a number of bits to be programmed in an Mth virtual page where M is the number of bits per cell. A corresponding polarity control flag is set when a data word is inverted. Data is selectively inverted according the corresponding polarity flag when being read from the M virtual pages. A number of the highest threshold voltage programming states in reduced. This provides tighter distribution of programmed cell threshold voltage, reduced power consumption, reduced programming time, and enhanced device reliability.

Description

[0001] Cross References to Related Applications [0002] This application claims the benefit of US Patent Application Serial No. 12 / 166,876, filed July 2, 2008. technical field [0003] The present invention relates generally to nonvolatile memory systems and, more particularly, to nonvolatile multiple bits per cell (MBC) memory systems with data polarity control. Background technique [0004] In conventional single-bit-per-cell memory devices, memory cells assume one of two information storage states, either an "on" state or an "off" state. The binary status of "on" or "off" defines one bit of information. As a result, a memory device capable of storing n bits of data requires (n) separate memory cells. [0005] Increasing the number of bits stored using a single-bit-per-cell memory device requires increasing the number of memory cells in a one-to-one manner with the number of data bits to be stored. Methods for increasing the number of storage bits stored in memory dev...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/02G11C11/56G11C16/10G11C16/26
CPCG11C7/1006G11C11/5628G11C16/26G11C11/5642G11C2211/5646G11C2211/5647G11C16/10G11C29/00
Inventor 金镇祺W·皮特里
Owner CONVERSANT INTPROP MANAGEMENT INC