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A Spare Area Allocation Method for Improving Storage Reliability of Multilayer Cell Nand-flash

A technology of a multi-layer cell and an allocation method, applied in the field of NAND-Flash, can solve the problems of increasing the probability of data block errors and reducing the reliability of stored data, etc.

Inactive Publication Date: 2011-12-14
XI AN JIAOTONG UNIV
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  • Claims
  • Application Information

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Problems solved by technology

For the current NAND-Flash mainstream technology multi-layer unit, each storage unit stores two bits of data, due to the increase in density, the error probability of the data block increases, and the error correction capability required by the data block is much greater than the requirements of the single-layer unit process. This leads to a reduction in the reliability of stored data

Method used

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  • A Spare Area Allocation Method for Improving Storage Reliability of Multilayer Cell Nand-flash

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Embodiment Construction

[0013] The present invention will be described in more detail below in conjunction with the accompanying drawings and embodiments.

[0014] like figure 1 As shown, the four state codes of the MSB and LSB of the multi-layer unit NAND FLASH storage unit are respectively 11 state 201, 01 state 202, 00 state 203 and 10 state 204. Since the multi-layer unit The voltage difference between two adjacent states is very small, which is very error-prone, so compared with the low-significant bit LSB, the high-significant bit MSB is more error-prone, and the high-significant bit MSB may switch between 11 state 201 and 01 state 202, It is also possible to switch between the 00 state 203 and the 10 state 204 , while the LSB is only possible to switch between the 01 state 202 and the 00 state 203 . Therefore, the error rates of 205 and 206 MSB pages and LSB pages belonging to the MSB page and LSB page are also different, and the error rate of the MSB page is twice that of the LSB page .

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Abstract

A spare area allocation method for improving the storage reliability of multi-layer unit NAND-Flash, by utilizing the different error rates of the MSB page and the LSB page of the low-significant bit, redistributing the spare area of ​​the multi-layer unit NAND-Flash, the high-significant bit The error rate of the MSB page is higher, and more spare areas are needed for error correction. Therefore, all the spare areas of the high-significant MSB pages are used to store error correction codes, and the low-significant bit LSB pages use less spare areas to store correction codes. The error code, the management information of the MSB page and the LSB page are all stored in the spare area of ​​the LSB page, which improves the data reliability of the multi-layer unit NAND-Flash.

Description

technical field [0001] The invention relates to the technical field of NAND-Flash, in particular to a spare area allocation method for improving storage reliability of multilayer unit NAND-Flash. Background technique [0002] NAND-Flash is a storage medium for storing data. A NAND-Flash is composed of data blocks, and each data block is composed of page groups. Generally, each page of a page group consists of an n-byte data area and an m-byte spare area. In addition, in terms of data storage logic, the n-byte data area of ​​each page can be decomposed into s sectors (SECTOR), where each sector (SECTOR) includes n / s byte data areas, and in addition, m bytes are reserved The area stores m / s bytes for each sector (SECTOR) for corresponding error correction codes and other management information, where n, m, and s are positive integers, and n is greater than m, and both n and m are s Integer multiples of . [0003] Although the charge of NAND-Flash can permanently preserve t...

Claims

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Application Information

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IPC IPC(8): G06F12/02
Inventor 牛众品孙宏滨郑南宁
Owner XI AN JIAOTONG UNIV
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