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Testing circuit suitable for PSVA and array

A technology for testing circuits and arrays, applied in the field of LCD, can solve the problems of complex peripheral circuits and a large number of probes, and achieve the effect of reducing the number and simplifying the complexity.

Inactive Publication Date: 2012-01-04
TCL CHINA STAR OPTOELECTRONICS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a test circuit suitable for PSVA and array, to solve the problems of too many probes and complex peripheral circuits in the existing array test circuit

Method used

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  • Testing circuit suitable for PSVA and array
  • Testing circuit suitable for PSVA and array
  • Testing circuit suitable for PSVA and array

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Embodiment Construction

[0022] The following descriptions of the various embodiments refer to the accompanying drawings to illustrate specific embodiments in which the present invention can be practiced. The directional terms mentioned in the present invention, such as "up", "down", "front", "back", "left", "right", "inside", "outside", "side", etc., are for reference only The orientation of the attached schema. Therefore, the directional terms used are used to illustrate and understand the present invention, but not to limit the present invention.

[0023] Such as figure 2 As shown, it is a schematic structural diagram of a test circuit suitable for PSVA and an array according to the first preferred embodiment provided by the present invention. figure 2 Among them, the extension lines of each gate line G1, G2, ..., Gn and the data line D1, D2, ..., Dm signal line are connected to the drains of the respective corresponding thin film transistors, and the data lines D1, D2, ..., the sources (Sourc...

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Abstract

The invention relates to the technical field of LCD (Liquid Crystal Display), and particularly relates to a testing circuit suitable for PSVA and an array. The testing circuit suitable for PSVA and the array comprises a grid line signal circuit, a data line signal circuit, a first welding disk and a film transistor, wherein extension lines of the grid line signal circuit and the data line signal circuit are respectively connected with each corresponding drain electrode of the film transistor; source electrodes of the film transistor which corresponds to the data line signal circuit are mutually connected and are also connected with the first welding disk; a grid of the film transistor which corresponds to the data line signal circuit is connected to a coating structure on a base board; and a source electrode of the film transistor which corresponds to the grid line signal circuit is mutually connected with the grid and is also connected to the coating structure on the base board. The technical scheme provided by the invention can effectively reduce the number of welding disks of a glass edge and simplify the complexity of a whole circuit compared with a traditional testing circuit suitable for PSVA and the array.

Description

【Technical field】 [0001] The invention relates to the technical field of LCD, in particular to a test circuit suitable for PSVA and array. 【Background technique】 [0002] In the current PSVA (Polymer Stabilized Vertical Alignment, polymer stabilized vertical alignment technology) process, in order to perform circuit testing in the array (array) segment process, the so-called shorting bar (short bar) is generally used to connect all gate lines (Gate line) and data line (data line) are connected in parallel to form G1, G2, ..., Gn and D1, D2, ..., Dm signals, specifically as figure 1 As shown, the design of n and m values ​​must be greater than or equal to 2, so that the adjacent data lines or adjacent gate lines can be short-circuited during the test, so each chip (chip) will have a corresponding G1 , G2, ..., Gn and D1, D2, ..., Dm and several common signal pads C1, C2, ..., Cx (collectively referred to as com) are used as input points for external signals during array test...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G09G3/00
CPCG02F1/1309G09G3/00G09G3/006
Inventor 陈政鸿
Owner TCL CHINA STAR OPTOELECTRONICS TECH CO LTD